Re: [PATCH 1/3] dt-bindings: pwm: Add MediaTek display PWM bindings

From	Rob Herring <robh@kernel.org>
Newsgroups	linux.kernel
Subject	Re: [PATCH 1/3] dt-bindings: pwm: Add MediaTek display PWM bindings
Date	2016-06-03 00:50 +0200
Message-ID	<rFJB8-3vM-13@gated-at.bofh.it> (permalink)
References	<rEr3z-1OX-5@gated-at.bofh.it> <rEr3A-1OX-9@gated-at.bofh.it>
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On Mon, May 30, 2016 at 04:41:50PM +0800, Weiqing Kong wrote:
> Add MT2701 compatible string.
> 
> Signed-off-by: Weiqing Kong <weiqing.kong@mediatek.com>
> ---
>  Documentation/devicetree/bindings/pwm/pwm-mtk-disp.txt | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/pwm/pwm-mtk-disp.txt b/Documentation/devicetree/bindings/pwm/pwm-mtk-disp.txt
> index f8f59ba..f2f2fa9 100644
> --- a/Documentation/devicetree/bindings/pwm/pwm-mtk-disp.txt
> +++ b/Documentation/devicetree/bindings/pwm/pwm-mtk-disp.txt
> @@ -1,9 +1,10 @@
>  MediaTek display PWM controller
>  
>  Required properties:
> - - compatible: should be "mediatek,<name>-disp-pwm":
> -   - "mediatek,mt8173-disp-pwm": found on mt8173 SoC.
> + - compatible: should be like these:
> +   - "mediatek,mt2701-disp-bls": found on mt2701 SoC.

Why bls instead of pwm?

>     - "mediatek,mt6595-disp-pwm": found on mt6595 SoC.
> +   - "mediatek,mt8173-disp-pwm": found on mt8173 SoC.
>   - reg: physical base address and length of the controller's registers.
>   - #pwm-cells: must be 2. See pwm.txt in this directory for a description of
>     the cell format.
> -- 
> 1.8.1.1.dirty
>

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Re: [PATCH 1/3] dt-bindings: pwm: Add MediaTek display PWM bindings Rob Herring <robh@kernel.org> - 2016-06-03 00:50 +0200
  Re: [PATCH 1/3] dt-bindings: pwm: Add MediaTek display PWM bindings weiqing kong <weiqing.kong@mediatek.com> - 2016-06-03 08:50 +0200
    Re: [PATCH 1/3] dt-bindings: pwm: Add MediaTek display PWM bindings Matthias Brugger <matthias.bgg@gmail.com> - 2016-06-03 17:10 +0200
      Re: [PATCH 1/3] dt-bindings: pwm: Add MediaTek display PWM bindings weiqing kong <weiqing.kong@mediatek.com> - 2016-06-08 08:50 +0200

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