Re: [RFC 2/3] drm/mediatek: add support for Mediatek SoC MT2701

From	Emil Velikov <emil.l.velikov@gmail.com>
Newsgroups	linux.kernel
Subject	Re: [RFC 2/3] drm/mediatek: add support for Mediatek SoC MT2701
Date	2016-05-18 22:30 +0200
Message-ID	<rAggq-6OT-19@gated-at.bofh.it> (permalink)
References	<rxXrA-4Y2-5@gated-at.bofh.it> <rxXrB-4Y2-25@gated-at.bofh.it> <rzJXi-2UD-55@gated-at.bofh.it> <rA5bj-83w-13@gated-at.bofh.it>
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On 18 May 2016 at 09:33, YT Shen <yt.shen@mediatek.com> wrote:

>> > @@ -108,6 +108,10 @@ int mtk_drm_gem_dumb_create(struct drm_file *file_priv, struct drm_device *dev,
>> >         int ret;
>> >
>> >         args->pitch = DIV_ROUND_UP(args->width * args->bpp, 8);
>> > +       /*
>> > +       * align to 8 bytes since Mali requires it.
>> > +       */
>> > +       args->pitch = ALIGN(args->pitch, 8);
>> Are you sure we need this, based on the line just above ?
> I think bpp stands for bits per pixel, so width * bpp / 8 simply transfer from bits to bytes, which
> cannot guarantee align to 8.
>
You're absolutely correct. Reading the comment made me loose my mind
and completely misinterpret the division macro.

> I will remove this align part from the patch, this constraint is not from display controller.
Thank you !

Regards
Emil

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Re: [RFC 2/3] drm/mediatek: add support for Mediatek SoC MT2701 Emil Velikov <emil.l.velikov@gmail.com> - 2016-05-17 12:00 +0200
  Re: [RFC 2/3] drm/mediatek: add support for Mediatek SoC MT2701 YT Shen <yt.shen@mediatek.com> - 2016-05-18 10:40 +0200
    Re: [RFC 2/3] drm/mediatek: add support for Mediatek SoC MT2701 Emil Velikov <emil.l.velikov@gmail.com> - 2016-05-18 22:30 +0200

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