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[PATCH 4.4 203/342] drm/dp/mst: Reverse order of MST enable and clearing VC payload table.

From Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Newsgroups linux.kernel
Subject [PATCH 4.4 203/342] drm/dp/mst: Reverse order of MST enable and clearing VC payload table.
Date 2016-03-02 01:50 +0100
Message-ID <r839g-8lk-15@gated-at.bofh.it> (permalink)
References <r82mS-7Ml-9@gated-at.bofh.it>
Organization linux.* mail to news gateway

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4.4-stable review patch.  If anyone has any objections, please let me know.

------------------

From: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>

commit c175cd16df272119534058f28cbd5eeac6ff2d24 upstream.

On DELL U3014 if you clear the table before enabling MST it sometimes
hangs the receiver.

Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

---
 drivers/gpu/drm/drm_dp_mst_topology.c |   12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -1976,6 +1976,12 @@ int drm_dp_mst_topology_mgr_set_mst(stru
 		mgr->mst_primary = mstb;
 		kref_get(&mgr->mst_primary->kref);
 
+		ret = drm_dp_dpcd_writeb(mgr->aux, DP_MSTM_CTRL,
+							 DP_MST_EN | DP_UP_REQ_EN | DP_UPSTREAM_IS_SRC);
+		if (ret < 0) {
+			goto out_unlock;
+		}
+
 		{
 			struct drm_dp_payload reset_pay;
 			reset_pay.start_slot = 0;
@@ -1983,12 +1989,6 @@ int drm_dp_mst_topology_mgr_set_mst(stru
 			drm_dp_dpcd_write_payload(mgr, 0, &reset_pay);
 		}
 
-		ret = drm_dp_dpcd_writeb(mgr->aux, DP_MSTM_CTRL,
-					 DP_MST_EN | DP_UP_REQ_EN | DP_UPSTREAM_IS_SRC);
-		if (ret < 0) {
-			goto out_unlock;
-		}
-
 		queue_work(system_long_wq, &mgr->work);
 
 		ret = 0;

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[PATCH 4.4 203/342] drm/dp/mst: Reverse order of MST enable and clearing VC payload table. Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-03-02 01:50 +0100

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