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[PATCH 2/8] coresight: etm4x: adding config and traceid registers

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Adding new sysFS management interface to query the configuration
and the traceid registers.  Both are required to convey information
to the perf cmd line tools when using ETMv4 tracers as PMU.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
---
 Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x | 13 +++++++++++++
 drivers/hwtracing/coresight/coresight-etm4x-sysfs.c         |  4 ++++
 2 files changed, 17 insertions(+)

diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x b/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x
index 2355ed8ae31f..36258bc1b473 100644
--- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x
+++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x
@@ -359,6 +359,19 @@ Contact:	Mathieu Poirier <mathieu.poirier@linaro.org>
 Description:	(R) Print the content of the Peripheral ID3 Register
 		(0xFEC).  The value is taken directly from the HW.
 
+What:		/sys/bus/coresight/devices/<memory_map>.etm/mgmt/trcconfig
+Date:		February 2016
+KernelVersion:	4.07
+Contact:	Mathieu Poirier <mathieu.poirier@linaro.org>
+Description:	(R) Print the content of the trace configuration register
+		(0x010) as currently set by SW.
+
+What:		/sys/bus/coresight/devices/<memory_map>.etm/mgmt/trctraceid
+Date:		February 2016
+KernelVersion:	4.07
+Contact:	Mathieu Poirier <mathieu.poirier@linaro.org>
+Description:	(R) Print the content of the trace ID register (0x040).
+
 What:		/sys/bus/coresight/devices/<memory_map>.etm/trcidr/trcidr0
 Date:		April 2015
 KernelVersion:	4.01
diff --git a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c
index 5db0de7d4e0e..39a8b077e0c2 100644
--- a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c
+++ b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c
@@ -1972,6 +1972,8 @@ coresight_simple_func(trcoslsr, TRCOSLSR);
 coresight_simple_func(trcpdcr, TRCPDCR);
 coresight_simple_func(trcpdsr, TRCPDSR);
 coresight_simple_func(trclsr, TRCLSR);
+coresight_simple_func(trcconfig, TRCCONFIGR);
+coresight_simple_func(trctraceid, TRCTRACEIDR);
 coresight_simple_func(trcauthstatus, TRCAUTHSTATUS);
 coresight_simple_func(trcdevid, TRCDEVID);
 coresight_simple_func(trcdevtype, TRCDEVTYPE);
@@ -1985,6 +1987,8 @@ static struct attribute *coresight_etmv4_mgmt_attrs[] = {
 	&dev_attr_trcpdcr.attr,
 	&dev_attr_trcpdsr.attr,
 	&dev_attr_trclsr.attr,
+	&dev_attr_trcconfig.attr,
+	&dev_attr_trctraceid.attr,
 	&dev_attr_trcauthstatus.attr,
 	&dev_attr_trcdevid.attr,
 	&dev_attr_trcdevtype.attr,
-- 
2.1.4

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[PATCH 0/8] coresight: etmv4: make driver usable by Perf Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-02-29 20:00 +0100
  [PATCH 5/8] coresight: etm4x: unlocking tracers in default arch init Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-02-29 20:00 +0100
  [PATCH 4/8] coresight: etm4x: splitting etmv4 default configuration Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-02-29 20:00 +0100
  [PATCH 6/8] coresight: etm4x: moving etm_drvdata::enable to atomic field Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-02-29 20:00 +0100
  [PATCH 2/8] coresight: etm4x: adding config and traceid registers Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-02-29 20:00 +0100
  [PATCH 8/8] coresight: etm4x: implementing the perf PMU API Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-02-29 20:00 +0100
  [PATCH 7/8] coresight: etm4x: implementing user/kernel mode tracing Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-02-29 20:00 +0100

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