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Re: [PATCH 1/4] EDAC, MCE, AMD: Enable error decoding of Scalable MCA errors

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On Tue, Feb 23, 2016 at 04:50:37PM -0600, Aravind Gopalakrishnan wrote:
> Sorry about that. Looks like this pair is not defined in spelling.txt. So,
> might be worth adding there as well?

Oh geez, we have a spelling.txt! I think we can declare the kernel as
done and go do something else with our lives...

> It's the block for programming FUSE registers.

Oh, that's what it is.

So maybe "fuses block" or "fuses" or ... just the capitalized "FUSE" is
kinda misleading.

> How about "Unable to gather IP block that threw the error. Therefore cannot
> decode errors further.\n"

Or simply "Invalid IP block specified, error information is unreliable."
and still continue decoding. It might still be recognizable from the
signature, methinks.

> If for some reason the CPUID bit is not set, then we should not assume the
> processor supports the features right?

Is that even remotely possible? If yes, then we should keep the warning,
otherwise it is useless.

-- 
Regards/Gruss,
    Boris.

ECO tip #101: Trim your mails when you reply.

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Re: [PATCH 1/4] EDAC, MCE, AMD: Enable error decoding of Scalable  MCA errors Borislav Petkov <bp@alien8.de> - 2016-02-23 13:40 +0100
  Re: [PATCH 1/4] EDAC, MCE, AMD: Enable error decoding of Scalable MCA  errors Aravind Gopalakrishnan <aravind.gopalakrishnan@amd.com> - 2016-02-24 00:30 +0100
    Re: [PATCH 1/4] EDAC, MCE, AMD: Enable error decoding of Scalable  MCA errors Borislav Petkov <bp@alien8.de> - 2016-02-24 12:30 +0100

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