Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]

Groups > linux.kernel > #1339818

Re: [patch V2 11/28] x86/topology: Create logical package id

Show all headers | View raw

Thomas Gleixner <tglx@linutronix.de> writes:


> +
> +	if (c->cpuid_level >= 0x00000001) {
> +		u32 eax, ebx, ecx, edx;
> +
> +		cpuid(0x00000001, &eax, &ebx, &ecx, &edx);

Use cpuid_edx()

> +		/*
> +		 * If HTT (EDX[28]) is set EBX[16:23] contain the number of
> +		 * apicids which are reserved per package. Store the resulting
> +		 * shift value for the package management code.
> +		 */
> +		if (edx & (1U << 28))
> +			c->x86_coreid_bits = get_count_order((ebx >> 16) & 0xff);
> +	}
> +++ b/arch/x86/kernel/cpu/proc.c
> @@ -12,6 +12,7 @@ static void show_cpuinfo_core(struct seq
>  {
>  #ifdef CONFIG_SMP
>  	seq_printf(m, "physical id\t: %d\n", c->phys_proc_id);
> +	seq_printf(m, "logical id\t: %d\n", c->logical_proc_id);


I'm not sure it makes sense to export this. What good would it be for
the user?

If it was it would need to be documented somewhere. But I would
just drop it and keep it kernel internal.

FWIW every time something is added to this file it usually breaks
some (dumb) programs.

> +	/*
> +	 * Today neither Intel nor AMD support heterogenous systems. That
> +	 * might change in the future....
> +	 */
> +	ncpus = boot_cpu_data.x86_max_cores * smp_num_siblings;
> +	__max_logical_packages = DIV_ROUND_UP(nr_cpu_ids, ncpus);

FWIW Hypervisors can do nearly everything today.

I assume your code handles it.

Let's hope that the Hypervisors always set up the correct CPUID now
for their sibling configuration. If they don't with this change
some CPUs would be suddenly lost.

Would it be worth to have a kernel option where the maximum can be overriden
in case this happens?


-Andi
-- 
ak@linux.intel.com -- Speaking for myself only

Back to linux.kernel | Previous | Next — Previous in thread | Next in thread | Find similar | Unroll thread

Thread

[patch V2 00/28] x86/perf/intel/uncore|rapl: Fix error handling and  sanitize pmu management Thomas Gleixner <tglx@linutronix.de> - 2016-02-22 12:20 +0100
  [patch V2 18/28] x86/perf/intel_rapl: Make Knights Landings support  functional Thomas Gleixner <tglx@linutronix.de> - 2016-02-22 12:20 +0100
    Re: [patch V2 18/28] x86/perf/intel_rapl: Make Knights Landings  support functional Borislav Petkov <bp@alien8.de> - 2016-02-22 21:40 +0100
  [patch V2 13/28] x86/perf/intel_uncore: Clear all hardware state on  exit Thomas Gleixner <tglx@linutronix.de> - 2016-02-22 12:20 +0100
    Re: [patch V2 13/28] x86/perf/intel_uncore: Clear all hardware state  on exit Peter Zijlstra <peterz@infradead.org> - 2016-02-22 13:00 +0100
      Re: [patch V2 13/28] x86/perf/intel_uncore: Clear all hardware state  on exit Thomas Gleixner <tglx@linutronix.de> - 2016-02-22 13:10 +0100
  [patch V2 17/28] x86/perf/cqm: Get rid of the silly for_each_cpu  lookups Thomas Gleixner <tglx@linutronix.de> - 2016-02-22 12:20 +0100
  [patch V2 16/28] x86/perf/intel_uncore: Make it modular Thomas Gleixner <tglx@linutronix.de> - 2016-02-22 12:20 +0100
  [patch V2 12/28] x86/perf/uncore: Track packages not per cpu data Thomas Gleixner <tglx@linutronix.de> - 2016-02-22 12:20 +0100
  [patch V2 24/28] x86/perf/intel/rapl: Make pmu lock raw Thomas Gleixner <tglx@linutronix.de> - 2016-02-22 12:20 +0100
  [patch V2 02/28] x86/perf/intel/uncore: Simplify error rollback Thomas Gleixner <tglx@linutronix.de> - 2016-02-22 12:20 +0100
  [patch V2 03/28] x86/perf/intel/uncore: Fix error handling Thomas Gleixner <tglx@linutronix.de> - 2016-02-22 12:20 +0100
  [patch V2 22/28] x86/perf/intel/rapl: Cleanup the printk output Thomas Gleixner <tglx@linutronix.de> - 2016-02-22 12:20 +0100
    Re: [patch V2 22/28] x86/perf/intel/rapl: Cleanup the printk output Andi Kleen <andi@firstfloor.org> - 2016-02-22 19:50 +0100
      Re: [patch V2 22/28] x86/perf/intel/rapl: Cleanup the printk  output Thomas Gleixner <tglx@linutronix.de> - 2016-02-22 20:00 +0100
  [patch V2 08/28] x86/perf/uncore: Make uncore_pcibus_to_physid static Thomas Gleixner <tglx@linutronix.de> - 2016-02-22 12:20 +0100
  [patch V2 11/28] x86/topology: Create logical package id Thomas Gleixner <tglx@linutronix.de> - 2016-02-22 12:20 +0100
    Re: [patch V2 11/28] x86/topology: Create logical package id Andi Kleen <andi@firstfloor.org> - 2016-02-22 20:00 +0100
      Re: [patch V2 11/28] x86/topology: Create logical package id Thomas Gleixner <tglx@linutronix.de> - 2016-02-22 20:10 +0100
  [patch V2 14/28] x86/perf/intel_uncore: Make PCI and MSR uncore  independent Thomas Gleixner <tglx@linutronix.de> - 2016-02-22 12:20 +0100
  [patch V2 23/28] x86/perf/intel/rapl: Refactor code some more Thomas Gleixner <tglx@linutronix.de> - 2016-02-22 12:20 +0100
  [patch V2 07/28] x86/perf/intel_uncore: Make code readable Thomas Gleixner <tglx@linutronix.de> - 2016-02-22 12:20 +0100
  [patch V2 20/28] x86/perf/intel/rapl: Sanitize the quirk handling Thomas Gleixner <tglx@linutronix.de> - 2016-02-22 12:20 +0100
  [patch V2 25/28] x86/perf/intel/rapl: Utilize event->pmu_private Thomas Gleixner <tglx@linutronix.de> - 2016-02-22 12:20 +0100
  [patch V2 05/28] x86/perf/intel_uncore: Cleanup hardware on exit Thomas Gleixner <tglx@linutronix.de> - 2016-02-22 12:20 +0100
  Re: [patch V2 00/28] x86/perf/intel/uncore|rapl: Fix error handling and sanitize pmu management Andi Kleen <andi@firstfloor.org> - 2016-02-22 20:00 +0100

csiph-web