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Groups > linux.kernel > #1336030
| From | xuejiancheng <xuejiancheng@huawei.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [RESEND PATCH v8 1/6] clk: hisilicon: add CRG driver for hi3519 soc |
| Date | 2016-02-17 04:20 +0100 |
| Message-ID | <r30OJ-mV-5@gated-at.bofh.it> (permalink) |
| References | <qYED7-2lp-7@gated-at.bofh.it> <qYED7-2lp-5@gated-at.bofh.it> <r2YDg-73D-1@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
Hi Mike, Thank you very much for your comments. On 2016/2/17 8:46, Michael Turquette wrote: > Hello Jiancheng Xue, > > Quoting Jiancheng Xue (2016-02-04 18:31:07) >> diff --git a/drivers/clk/hisilicon/Makefile b/drivers/clk/hisilicon/Makefile >> index 74dba31..3f57b09 100644 >> --- a/drivers/clk/hisilicon/Makefile >> +++ b/drivers/clk/hisilicon/Makefile >> @@ -4,8 +4,10 @@ >> >> obj-y += clk.o clkgate-separated.o clkdivider-hi6220.o >> >> +obj-$(CONFIG_RESET_CONTROLLER) += reset.o > > Do you really want to build reset.o for all hisi SoCs? > This reset controller driver will be just used in some of hisilicon SOCs. I'll add a specific config item for it like CONFIG_RESET_HISI. The config item will be selected by default in SOCs needing this driver. I'll also fix other issues in next version. Thank you! Regards, Jiancheng.
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Re: [RESEND PATCH v8 1/6] clk: hisilicon: add CRG driver for hi3519 soc Michael Turquette <mturquette@baylibre.com> - 2016-02-17 02:00 +0100 Re: [RESEND PATCH v8 1/6] clk: hisilicon: add CRG driver for hi3519 soc xuejiancheng <xuejiancheng@huawei.com> - 2016-02-17 04:20 +0100
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