Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]

Groups > linux.kernel > #1277521

Re: [PATCH] clk: tegra: Fix bypassing of PLLs

Show all headers | View raw

On 25 November 2015 at 07:11, Thierry Reding <thierry.reding@gmail.com> wrote:
> On Mon, Nov 23, 2015 at 03:18:59PM -0800, Tyler Baker wrote:
>> Hi Jon,
>>
>> On 20 November 2015 at 07:11, Jon Hunter <jonathanh@nvidia.com> wrote:
>> > The _clk_disable_pll() function will attempt to place a PLL into bypass
>> > if the TEGRA_PLL_BYPASS is specified for the PLL and then disable the PLL
>> > by clearing the enable bit. To place the PLL into bypass, the bypass bit
>> > needs to be set and not cleared. Fix this by setting the bypass bit and
>> > not clearing it.
>> >
>> > Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
>>
>> The kernelci.org bot recently detected a jetson-tk1 boot failure[1][2]
>> in the tegra tree. This boot failure has only been observed when
>> booting with a multi_v7_defconfig kernel variant. The bot bisected[3]
>> this boot failure to this commit, and I confirmed reverting it on top
>> of the tegra for-next branch resolves the issue. The ramdisk[4] used
>> for booting is loaded with the modules from the build. It appears to
>> me that as the modules are being loaded in userspace by eudev the
>> jetson-tk1 locks up. I've sifted through the console logs a bit, and
>> found this splat to be most interesting[5].  Can you confirm this
>> issue on your end?
>
> Just to close the loop on this: we've discussed this on IRC and came to
> the conclusion that not using the bypass mode is safer (switching into
> and out of bypass can glitch). I've dropped this patch for now and Jon
> will be looking into a second revision of the patch which, in addition
> to fixing bypass (the fix is legit, it just happens to break because of
> the glitch, most likely), will also remove the BYPASS flag setting so
> that bypass will not be used.

Thanks for the update, I appreciate you guys looking into this issue.
Please CC me on any fixes, I can re-test and give my tested-by.

Cheers,

Tyler
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Back to linux.kernel | Previous | Next — Previous in thread | Next in thread | Find similar | Unroll thread

Thread

[PATCH] clk: tegra: Fix bypassing of PLLs Jon Hunter <jonathanh@nvidia.com> - 2015-11-20 16:20 +0100
  Re: [PATCH] clk: tegra: Fix bypassing of PLLs Rhyland Klein <rklein@nvidia.com> - 2015-11-20 17:50 +0100
  Re: [PATCH] clk: tegra: Fix bypassing of PLLs Stephen Boyd <sboyd@codeaurora.org> - 2015-11-20 18:20 +0100
    Re: [PATCH] clk: tegra: Fix bypassing of PLLs Jon Hunter <jonathanh@nvidia.com> - 2015-11-23 13:40 +0100
  Re: [PATCH] clk: tegra: Fix bypassing of PLLs Tyler Baker <tyler.baker@linaro.org> - 2015-11-24 00:20 +0100
    Re: [PATCH] clk: tegra: Fix bypassing of PLLs Jon Hunter <jonathanh@nvidia.com> - 2015-11-24 11:30 +0100
    Re: [PATCH] clk: tegra: Fix bypassing of PLLs Thierry Reding <thierry.reding@gmail.com> - 2015-11-24 16:20 +0100
    Re: [PATCH] clk: tegra: Fix bypassing of PLLs Jon Hunter <jonathanh@nvidia.com> - 2015-11-24 16:30 +0100
    Re: [PATCH] clk: tegra: Fix bypassing of PLLs Thierry Reding <thierry.reding@gmail.com> - 2015-11-25 16:20 +0100
      Re: [PATCH] clk: tegra: Fix bypassing of PLLs Tyler Baker <tyler.baker@linaro.org> - 2015-11-25 17:00 +0100
        Re: [PATCH] clk: tegra: Fix bypassing of PLLs Jon Hunter <jonathanh@nvidia.com> - 2015-11-25 18:50 +0100
          Re: [PATCH] clk: tegra: Fix bypassing of PLLs Jon Hunter <jonathanh@nvidia.com> - 2015-11-26 11:00 +0100

csiph-web