[RESEND PATCH V4 23/26] perf tools: making function set_max_cpu_num() non static

From	Mathieu Poirier <mathieu.poirier@linaro.org>
Newsgroups	linux.kernel
Subject	[RESEND PATCH V4 23/26] perf tools: making function set_max_cpu_num() non static
Date	2015-11-23 19:40 +0100
Message-ID	<qy4bU-5B2-41@gated-at.bofh.it> (permalink)
References	<qy4bT-5B2-3@gated-at.bofh.it>
Organization	linux.* mail to news gateway

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For memory allocation purposes, code located in other places
then util/cpumap.c may want to know how many CPUs the system has.

This patch is making function set_max_cpu_num() available to
other parts of the perf tool so that global variable
@max_cpu_num gets the right value when referenced by cpu__max_cpu().

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
---
 tools/perf/util/cpumap.c | 2 +-
 tools/perf/util/cpumap.h | 1 +
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/tools/perf/util/cpumap.c b/tools/perf/util/cpumap.c
index 3667e2123e5b..97ef46e4a0f6 100644
--- a/tools/perf/util/cpumap.c
+++ b/tools/perf/util/cpumap.c
@@ -373,7 +373,7 @@ out:
 }
 
 /* Determine highest possible cpu in the system for sparse allocation */
-static void set_max_cpu_num(void)
+void set_max_cpu_num(void)
 {
 	const char *mnt;
 	char path[PATH_MAX];
diff --git a/tools/perf/util/cpumap.h b/tools/perf/util/cpumap.h
index 0af9cecb4c51..6f7dce7dcca6 100644
--- a/tools/perf/util/cpumap.h
+++ b/tools/perf/util/cpumap.h
@@ -14,6 +14,7 @@ struct cpu_map {
 	int map[];
 };
 
+void set_max_cpu_num(void);
 struct cpu_map *cpu_map__new(const char *cpu_list);
 struct cpu_map *cpu_map__dummy_new(void);
 struct cpu_map *cpu_map__read(FILE *file);
-- 
1.9.1

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Thread

[RESEND PATCH V4 00/26] Coresight integration with perf Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-11-23 19:40 +0100
  [RESEND PATCH V4 03/26] coresight: etm3x: unlocking tracers in default arch init Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-11-23 19:40 +0100
  [RESEND PATCH V4 22/26] coresight: updating documentation to reflect integration with perf Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-11-23 19:40 +0100
  [RESEND PATCH V4 14/26] coresight: etm3x: adding perf_get/set_config() API Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-11-23 19:40 +0100
  [RESEND PATCH V4 13/26] coresight: etm3x: implementing user/kernel mode tracing Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-11-23 19:40 +0100
  [RESEND PATCH V4 12/26] coresight: etm3x: consolidating initial config Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-11-23 19:40 +0100
  [RESEND PATCH V4 19/26] coresight: etb10: implementing AUX space API Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-11-23 19:40 +0100
  [RESEND PATCH V4 21/26] coresight: introducing a global trace ID function Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-11-23 19:40 +0100
  [RESEND PATCH V4 10/26] coresight: etm3x: set progbit to stop trace collection Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-11-23 19:40 +0100
  [RESEND PATCH V4 16/26] perf: changing pmu::setup_aux() parameter to include event Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-11-23 19:40 +0100
  [RESEND PATCH V4 23/26] perf tools: making function set_max_cpu_num() non static Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-11-23 19:40 +0100
  [RESEND PATCH V4 11/26] coresight: etm3x: changing default trace configuration Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-11-23 19:40 +0100
  [RESEND PATCH V4 20/26] coresight: etm-perf: new PMU driver for ETM tracers Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-11-23 19:40 +0100
  [RESEND PATCH V4 26/26] perf tools: adding coresight etm PMU record capabilities Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-11-23 19:40 +0100
  [RESEND PATCH V4 25/26] perf tools: making coresight PMU listable Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-11-23 19:40 +0100
  [RESEND PATCH V4 24/26] perf tools: adding perf_session to *info_prive_size() Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-11-23 19:40 +0100
  [RESEND PATCH V4 15/26] coresight: etm3x: implementing perf_enable/disable() API Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-11-23 19:40 +0100
  [RESEND PATCH V4 17/26] coresight: etb10: moving to local atomic operations Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-11-23 19:40 +0100
  [RESEND PATCH V4 18/26] coresight: adding operation mode for sink->enable() Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-11-23 19:40 +0100
  [RESEND PATCH V4 01/26] coresight: etm3x: moving etm_readl/writel to header file Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-11-23 19:50 +0100
  [RESEND PATCH V4 05/26] coresight: etm3x: implementing 'cpu_id()' API Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-11-23 19:50 +0100
  [RESEND PATCH V4 09/26] coresight: add API to get sink from path Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-11-23 19:50 +0100
  [RESEND PATCH V4 08/26] coresight: etm3x: adding operation mode for etm_enable() Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-11-23 19:50 +0100
  [RESEND PATCH V4 06/26] coresight: associating path with session rather than tracer Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-11-23 19:50 +0100

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