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| From | Keith Busch <keith.busch@intel.com> |
| Newsgroups | linux.kernel |
| Subject | [PATCHv5 6/6] pciutils: Allow 32-bit domains |
| Date | Fri, 13 Nov 2015 18:20:03 +0100 |
| Message-ID | <quqb1-Rg-23@gated-at.bofh.it> (permalink) |
| References | <quqb0-Rg-3@gated-at.bofh.it> |
| X-Original-To | LKML <linux-kernel@vger.kernel.org>, x86@kernel.org, linux-pci@vger.kernel.org |
| X-Extloop1 | 1 |
| X-Ironport-Av | E=Sophos;i="5.20,288,1444719600"; d="scan'208";a="819295851" |
| X-Mailer | git-send-email 1.7.1 |
| Sender | robomod@news.nic.it |
| List-ID | <linux-kernel.vger.kernel.org> |
| X-Mailing-List | linux-kernel@vger.kernel.org |
| Approved | robomod@news.nic.it |
| Lines | 43 |
| Organization | linux.* mail to news gateway |
| X-Original-Cc | Jiang Liu <jiang.liu@linux.intel.com>, Thomas Gleixner <tglx@linutronix.de>, Dan Williams <dan.j.williams@intel.com>, Bjorn Helgaas <bhelgaas@google.com>, Bryan Veal <bryan.e.veal@intel.com>, Ingo Molnar <mingo@redhat.com>, "H. Peter Anvin" <hpa@zytor.com>, Martin Mares <mj@ucw.cz>, Jon Derrick <jonathan.derrick@intel.com>, Keith Busch <keith.busch@intel.com> |
| X-Original-Date | Fri, 13 Nov 2015 10:17:37 -0700 |
| X-Original-Message-ID | <1447435057-5212-7-git-send-email-keith.busch@intel.com> |
| X-Original-References | <1447435057-5212-1-git-send-email-keith.busch@intel.com> |
| X-Original-Sender | linux-kernel-owner@vger.kernel.org |
| Xref | csiph.com linux.kernel:1269106 |
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PCI-e segments will continue to use the lower 16 bits as required by
ACPI. Special domains may use the full 32-bits.
Signed-off-by: Keith Busch <keith.busch@intel.com>
---
lib/filter.c | 2 +-
lib/pci.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/lib/filter.c b/lib/filter.c
index d4254a0..075dc2f 100644
--- a/lib/filter.c
+++ b/lib/filter.c
@@ -45,7 +45,7 @@ pci_filter_parse_slot_v33(struct pci_filter *f, char *str)
if (str[0] && strcmp(str, "*"))
{
long int x = strtol(str, &e, 16);
- if ((e && *e) || (x < 0 || x > 0xffff))
+ if ((e && *e) || (x < 0))
return "Invalid domain number";
f->domain = x;
}
diff --git a/lib/pci.h b/lib/pci.h
index 10ba831..7e42765 100644
--- a/lib/pci.h
+++ b/lib/pci.h
@@ -119,7 +119,7 @@ struct pci_param *pci_walk_params(struct pci_access *acc, struct pci_param *prev
struct pci_dev {
struct pci_dev *next; /* Next device in the chain */
- u16 domain; /* PCI domain (host bridge) */
+ int32_t domain; /* PCI domain (host bridge) */
u8 bus, dev, func; /* Bus inside domain, device and function */
/* These fields are set by pci_fill_info() */
--
1.7.10.4
--
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[PATCHv5 0/6] Driver for new VMD device Keith Busch <keith.busch@intel.com> - 2015-11-13 18:20 +0100
[PATCHv5 2/6] pci: skip child bus with conflicting resources Keith Busch <keith.busch@intel.com> - 2015-11-13 18:20 +0100
[PATCHv5 6/6] pciutils: Allow 32-bit domains Keith Busch <keith.busch@intel.com> - 2015-11-13 18:20 +0100
[PATCHv5 5/6] x86/pci: Initial commit for new VMD device driver Keith Busch <keith.busch@intel.com> - 2015-11-13 18:20 +0100
Re: [PATCHv5 5/6] x86/pci: Initial commit for new VMD device driver Thomas Gleixner <tglx@linutronix.de> - 2015-11-13 22:30 +0100
Re: [PATCHv5 5/6] x86/pci: Initial commit for new VMD device driver Keith Busch <keith.busch@intel.com> - 2015-11-13 22:50 +0100
[PATCHv5 4/6] x86-pci: allow pci domain specific dma ops Keith Busch <keith.busch@intel.com> - 2015-11-13 18:20 +0100
[PATCHv5 1/6] msi: Relax msi_domain_alloc() to support parentless MSI irqdomains Keith Busch <keith.busch@intel.com> - 2015-11-13 18:20 +0100
Re: [PATCHv5 1/6] msi: Relax msi_domain_alloc() to support parentless MSI irqdomains Thomas Gleixner <tglx@linutronix.de> - 2015-11-13 22:30 +0100
Re: [PATCHv5 0/6] Driver for new VMD device Thomas Gleixner <tglx@linutronix.de> - 2015-11-13 22:30 +0100
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