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Groups > linux.kernel > #1267278
| From | Borislav Petkov <bp@alien8.de> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [RFC PATCH] x86/cpu: Fix MSR value truncation issue |
| Date | 2015-11-11 17:10 +0100 |
| Message-ID | <qtG8a-51X-23@gated-at.bofh.it> (permalink) |
| References | <qplF0-bI-19@gated-at.bofh.it> <qtCQX-2Lk-13@gated-at.bofh.it> <qtFYv-4IH-37@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On Wed, Nov 11, 2015 at 07:50:04AM -0800, Andy Lutomirski wrote:
> Not terribly surprising :) Someone (I forget who) told me that 32-bit
> SYSCALL (native 32-bit, not compat) was so full of errata that it was
> unusable. Even without errata, I don't really see how it would work
> well
No, showstopper appears much earlier: it is only supported on AMD. Which
would mean, yet another vendor special-handling. And I don't think it's
worth it.
Yeah, yeah, it might still be faster than SYSENTER, but 32-bit?! Srsly?!
I'm surprised that thing still builds even. :-)
> -- there's no MSR_SYSCALL_MASK,
Of course there is:
MSRC000_0084 SYSCALL Flag Mask (SYSCALL_FLAG_MASK):
31:0 - Mask: SYSCALL flag mask. Read-write. Reset: 0000_0000h. This register holds the EFLAGS
mask used by the SYSCALL instruction. 1=Clear the corresponding EFLAGS bit when executing the
SYSCALL instruction.
Intel has that too, except again, no SYSCALL in legacy mode on Intel.
--
Regards/Gruss,
Boris.
ECO tip #101: Trim your mails when you reply.
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Re: [RFC PATCH] x86/cpu: Fix MSR value truncation issue Borislav Petkov <bp@alien8.de> - 2015-11-11 13:40 +0100
Re: [RFC PATCH] x86/cpu: Fix MSR value truncation issue Andy Lutomirski <luto@amacapital.net> - 2015-11-11 17:00 +0100
Re: [RFC PATCH] x86/cpu: Fix MSR value truncation issue Borislav Petkov <bp@alien8.de> - 2015-11-11 17:10 +0100
Re: [RFC PATCH] x86/cpu: Fix MSR value truncation issue Brian Gerst <brgerst@gmail.com> - 2015-11-11 19:10 +0100
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