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Re: [PATCH v2 1/3] tty: Introduce UART_CAP_HW485

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2015-11-07 18:32 GMT+03:00 Peter Hurley <peter@hurleysoftware.com>:
> On 11/07/2015 07:39 AM, Matwey V. Kornilov wrote:
>> 2015-11-07 15:22 GMT+03:00 Peter Hurley <peter@hurleysoftware.com>:
>>> On 11/07/2015 05:09 AM, Matwey V. Kornilov wrote:
>>>> Introduce new capability UART_CAP_HW485 to mark 8250 UARTs which have
>>>> hardware support of line direction control.
>>>
>>> Since capabilities are not exported to user-space, how will user-space
>>> know if the port only provides emulated 485 (eg., where only HW485 is
>>> acceptable)?
>>
>> I cannot imagine the case when user really has to care about
>> implementation details.
>> In both cases the user will be provided with the consistent API
>> (TIOCGRS485/TIOCSRS485 ioctls) resulting into the same behavior.
>> Could you please expand your question?
>
> Well, the entire serial core is a 'consistent' API but yet we
> still report to user-space what the port type is. Same with lspci
> and lsusb.

Yes, that is correct.
I mean if you want the knowledge about HW485 be provided to the
user-space via some ioctl, then I cannot understand what application
is going to do with it.
It has single one option: use provided RS485 if it needs RS485, it
cannot purchase and install other hardware in runtime.
But I think we could add new read-only flag to struct serial_rs485,
say SER_RS485_SOFTWARE then user will know that software emulation is
being used.
Would it be ok?

>
> Regards,
> Peter Hurley
>
>
>>>> Signed-off-by: Matwey V. Kornilov <matwey@sai.msu.ru>
>>>> ---
>>>> Changes since v1:
>>>>  - Commit message has been wrapped
>>>>
>>>>  drivers/tty/serial/8250/8250.h         | 1 +
>>>>  drivers/tty/serial/8250/8250_fintek.c  | 1 +
>>>>  drivers/tty/serial/8250/8250_lpc18xx.c | 1 +
>>>>  drivers/tty/serial/8250/8250_pci.c     | 1 +
>>>>  4 files changed, 4 insertions(+)
>>>>
>>>> diff --git a/drivers/tty/serial/8250/8250.h b/drivers/tty/serial/8250/8250.h
>>>> index d54dcd8..92a4f47 100644
>>>> --- a/drivers/tty/serial/8250/8250.h
>>>> +++ b/drivers/tty/serial/8250/8250.h
>>>> @@ -69,6 +69,7 @@ struct serial8250_config {
>>>>       unsigned int    flags;
>>>>  };
>>>>
>>>> +#define UART_CAP_HW485       (1 << 7)        /* UART has hardware direction control for RS485 */
>>>>  #define UART_CAP_FIFO        (1 << 8)        /* UART has FIFO */
>>>>  #define UART_CAP_EFR (1 << 9)        /* UART has EFR */
>>>>  #define UART_CAP_SLEEP       (1 << 10)       /* UART has IER sleep */
>>>> diff --git a/drivers/tty/serial/8250/8250_fintek.c b/drivers/tty/serial/8250/8250_fintek.c
>>>> index 8947439..f2831a8 100644
>>>> --- a/drivers/tty/serial/8250/8250_fintek.c
>>>> +++ b/drivers/tty/serial/8250/8250_fintek.c
>>>> @@ -208,6 +208,7 @@ fintek_8250_probe(struct pnp_dev *dev, const struct pnp_device_id *dev_id)
>>>>       uart.port.iobase = pnp_port_start(dev, 0);
>>>>       uart.port.iotype = UPIO_PORT;
>>>>       uart.port.rs485_config = fintek_8250_rs485_config;
>>>> +     uart.capabilities = UART_CAP_HW485;
>>>>
>>>>       uart.port.flags |= UPF_SKIP_TEST | UPF_BOOT_AUTOCONF;
>>>>       if (pnp_irq_flags(dev, 0) & IORESOURCE_IRQ_SHAREABLE)
>>>> diff --git a/drivers/tty/serial/8250/8250_lpc18xx.c b/drivers/tty/serial/8250/8250_lpc18xx.c
>>>> index 99cd478..9d30276 100644
>>>> --- a/drivers/tty/serial/8250/8250_lpc18xx.c
>>>> +++ b/drivers/tty/serial/8250/8250_lpc18xx.c
>>>> @@ -175,6 +175,7 @@ static int lpc18xx_serial_probe(struct platform_device *pdev)
>>>>       uart.port.private_data = data;
>>>>       uart.port.rs485_config = lpc18xx_rs485_config;
>>>>       uart.port.serial_out = lpc18xx_uart_serial_out;
>>>> +     uart.capabilities = UART_CAP_HW485;
>>>>
>>>>       uart.dma = &data->dma;
>>>>       uart.dma->rxconf.src_maxburst = 1;
>>>> diff --git a/drivers/tty/serial/8250/8250_pci.c b/drivers/tty/serial/8250/8250_pci.c
>>>> index 4097f3f..c7c0ae9 100644
>>>> --- a/drivers/tty/serial/8250/8250_pci.c
>>>> +++ b/drivers/tty/serial/8250/8250_pci.c
>>>> @@ -1599,6 +1599,7 @@ static int pci_fintek_setup(struct serial_private *priv,
>>>>       port->port.iotype = UPIO_PORT;
>>>>       port->port.iobase = iobase;
>>>>       port->port.rs485_config = pci_fintek_rs485_config;
>>>> +     port->capabilities = UART_CAP_HW485;
>>>>
>>>>       data = devm_kzalloc(&pdev->dev, sizeof(u8), GFP_KERNEL);
>>>>       if (!data)
>>>>
>>>
>>
>>
>>
>



-- 
With best regards,
Matwey V. Kornilov.
Sternberg Astronomical Institute, Lomonosov Moscow State University, Russia
119991, Moscow, Universitetsky pr-k 13, +7 (495) 9392382
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[PATCH v2 1/3] tty: Introduce UART_CAP_HW485 "Matwey V. Kornilov" <matwey@sai.msu.ru> - 2015-11-07 11:20 +0100
  Re: [PATCH v2 1/3] tty: Introduce UART_CAP_HW485 Peter Hurley <peter@hurleysoftware.com> - 2015-11-07 13:30 +0100
    Re: [PATCH v2 1/3] tty: Introduce UART_CAP_HW485 "Matwey V. Kornilov" <matwey@sai.msu.ru> - 2015-11-07 13:50 +0100
      Re: [PATCH v2 1/3] tty: Introduce UART_CAP_HW485 Peter Hurley <peter@hurleysoftware.com> - 2015-11-07 16:40 +0100
        Re: [PATCH v2 1/3] tty: Introduce UART_CAP_HW485 "Matwey V. Kornilov" <matwey@sai.msu.ru> - 2015-11-07 22:20 +0100
          Re: [PATCH v2 1/3] tty: Introduce UART_CAP_HW485 Peter Hurley <peter@hurleysoftware.com> - 2015-11-07 23:10 +0100

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