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Groups > linux.kernel > #1265255
| From | haozhong.zhang@intel.com |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH v2 00/12] KVM: x86: add support for VMX TSC scaling |
| Date | 2015-11-09 01:10 +0100 |
| Message-ID | <qsIc2-7f7-9@gated-at.bofh.it> (permalink) |
| References | <qlzQe-5Bb-33@gated-at.bofh.it> <qrMKJ-3mu-5@gated-at.bofh.it> <qrOCS-4yt-5@gated-at.bofh.it> <qrW7p-YG-23@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On 11/06/15 21:40, Paolo Bonzini wrote: > > > On 06/11/2015 13:42, Haozhong Zhang wrote: > > On 11/06/15 11:49, Paolo Bonzini wrote: > >> > >> > >> On 20/10/2015 09:39, Haozhong Zhang wrote: > >>> This patchset adds support for VMX TSC scaling feature which is > >>> available on Intel Skylake CPU. The specification of VMX TSC scaling > >>> can be found at > >>> http://www.intel.com/content/www/us/en/processors/timestamp-counter-scaling-virtualization-white-paper.html > >>> > >>> VMX TSC scaling allows guest TSC which is read by guest rdtsc(p) > >>> instructions increases in a rate that is customized by the hypervisor > >>> and can be different than the host TSC rate. Basically, VMX TSC > >>> scaling adds a 64-bit field called TSC multiplier in VMCS so that, if > >>> VMX TSC scaling is enabled, TSC read by guest rdtsc(p) instructions > >>> will be calculated by the following formula: > >>> > >>> guest EDX:EAX = (Host TSC * TSC multiplier) >> 48 + VMX TSC Offset > >>> > >>> where, Host TSC = Host MSR_IA32_TSC + Host MSR_IA32_TSC_ADJUST. > >>> > >>> This patchset, when cooperating with another QEMU patchset (sent in > >>> another email "target-i386: save/restore vcpu's TSC rate during > >>> migration"), allows guest programs observe a consistent TSC rate even > >>> though they are migrated among machines with different host TSC rates. > >>> > >>> VMX TSC scaling shares some common logics with SVM TSC ratio which > >>> is already supported by KVM. Patch 1 ~ 8 move those common logics from > >>> SVM code to the common code. Upon them, patch 9 ~ 12 add VMX-specific > >>> support for VMX TSC scaling. > >>> > >>> Changes in v2: > >>> * Remove the duplicated variable 'kvm_tsc_scaling_ratio_rsvd'. > >>> * Remove an unnecessary error check in original patch 2. > >>> * Do 64-bit arithmetic by functions recommended by Paolo. > >>> * Make kvm_set_tsc_khz() returns an error number so that ioctl > >>> KVM_SET_TSC_KHZ does not return 0 if errors happen. > >>> > >>> Reviewed-by: Eric Northup <digitaleric@google.com> > >> > >> Thanks for the patches. There are a couple changes that I can do myself: > >> > >> 1) kvm_default_tsc_scaling_ratio can be initialized in > >> kvm_arch_hardware_setup, since it's just 1ULL << > >> kvm_tsc_scaling_ratio_frac_bits > >> > > Agree > > > >> 2) things that you are adding to include/linux/kvm_host.h should instead > >> go in arch/x86/include/linux/kvm_host.h > >> > > Agree, because they are x86 specific. > > > >> That's it. I'll commit it as soon as I test on AMD (today hopefully). > > It tested fine. I'll give it a shot with the 32-bit mul_u64_u64_shr on > Monday as well, but I don't expect any issue. > > Thanks, the patches are neat! > > Paolo Thank you for the test! Haozhong > -- > To unsubscribe from this list: send the line "unsubscribe kvm" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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Re: [PATCH v2 00/12] KVM: x86: add support for VMX TSC scaling Paolo Bonzini <pbonzini@redhat.com> - 2015-11-06 11:50 +0100
Re: [PATCH v2 00/12] KVM: x86: add support for VMX TSC scaling Haozhong Zhang <haozhong.zhang@intel.com> - 2015-11-06 13:50 +0100
Re: [PATCH v2 00/12] KVM: x86: add support for VMX TSC scaling Paolo Bonzini <pbonzini@redhat.com> - 2015-11-06 21:50 +0100
Re: [PATCH v2 00/12] KVM: x86: add support for VMX TSC scaling haozhong.zhang@intel.com - 2015-11-09 01:10 +0100
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