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Re: [PATCH] arm64: Increase the max granular size

From Joonsoo Kim <js1304@gmail.com>
Newsgroups linux.kernel
Subject Re: [PATCH] arm64: Increase the max granular size
Date 2015-11-05 12:50 +0100
Message-ID <qrrdg-64e-25@gated-at.bofh.it> (permalink)
References <qbAaT-4xo-59@gated-at.bofh.it> <qrkEO-1Qt-1@gated-at.bofh.it> <qrq7w-5nA-25@gated-at.bofh.it>
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2015-11-05 19:32 GMT+09:00 Catalin Marinas <catalin.marinas@arm.com>:
> On Thu, Nov 05, 2015 at 01:40:14PM +0900, Joonsoo Kim wrote:
>> On Tue, Sep 22, 2015 at 07:59:48PM +0200, Robert Richter wrote:
>> > From: Tirumalesh Chalamarla <tchalamarla@cavium.com>
>> >
>> > Increase the standard cacheline size to avoid having locks in the same
>> > cacheline.
>> >
>> > Cavium's ThunderX core implements cache lines of 128 byte size. With
>> > current granulare size of 64 bytes (L1_CACHE_SHIFT=6) two locks could
>> > share the same cache line leading a performance degradation.
>> > Increasing the size fixes that.
>>
>> Beside, slab-side bug, I don't think this argument is valid.
>> Even if this change is applied, statically allocated spinlock could
>> share the same cache line.
>
> The benchmarks didn't show any difference with or without this patch
> applied. What convinced me to apply it was this email:
>
> http://lkml.kernel.org/g/CAOZdJXUiRMAguDV+HEJqPg57MyBNqEcTyaH+ya=U93NHb-pdJA@mail.gmail.com

Okay.

> On ARM we have a notion of cache writeback granule (CWG) which tells us
> "the maximum size of memory that can be overwritten as a result of the
> eviction of a cache entry that has had a memory location in it
> modified". What we actually needed was ARCH_DMA_MINALIGN to be 128
> (currently defined to the L1_CACHE_BYTES value). However, this wouldn't
> have fixed the KMALLOC_MIN_SIZE, unless we somehow generate different
> kmalloc_caches[] and kmalloc_dma_caches[] and probably introduce a
> size_dma_index[].

If we create separate kmalloc caches for dma, can we apply this alignment
requirement only to dma caches? I guess some memory allocation request
that will be used for DMA operation doesn't specify GFP_DMA because
it doesn't want the memory from ZONE_DMA. In this case, we should apply
dma alignment requirement to all types of caches.

In fact, I know someone who try to implement this alignment separation like
as you mentioned to reduce memory waste. I first suggest this solution
to him but now I realize that it isn't possible because of above reason.

Am I missing?

If it isn't possible, is there another way to reduce memory waste due to
increase of dma alignment requirement in arm64?

Thanks.
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Thread

Re: [PATCH] arm64: Increase the max granular size Joonsoo Kim <iamjoonsoo.kim@lge.com> - 2015-11-05 05:50 +0100
  Re: [PATCH] arm64: Increase the max granular size Catalin Marinas <catalin.marinas@arm.com> - 2015-11-05 11:40 +0100
    Re: [PATCH] arm64: Increase the max granular size Joonsoo Kim <js1304@gmail.com> - 2015-11-05 12:50 +0100
      Re: [PATCH] arm64: Increase the max granular size Catalin Marinas <catalin.marinas@arm.com> - 2015-11-05 13:20 +0100
        Re: [PATCH] arm64: Increase the max granular size Joonsoo Kim <js1304@gmail.com> - 2015-11-09 08:50 +0100
          Re: [PATCH] arm64: Increase the max granular size Catalin Marinas <catalin.marinas@arm.com> - 2015-11-09 19:40 +0100
            Re: [PATCH] arm64: Increase the max granular size Joonsoo Kim <iamjoonsoo.kim@lge.com> - 2015-11-10 01:20 +0100

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