Re: [PATCH 3/4] x86,asm: Re-work smp_store_mb()

From	Davidlohr Bueso <dave@stgolabs.net>
Newsgroups	linux.kernel
Subject	Re: [PATCH 3/4] x86,asm: Re-work smp_store_mb()
Date	2015-11-03 02:40 +0100
Message-ID	<qqyJQ-4pO-1@gated-at.bofh.it> (permalink)
References	(1 earlier) <qoizw-SL-9@gated-at.bofh.it> <qok8l-1XT-91@gated-at.bofh.it> <qomD9-3DG-27@gated-at.bofh.it> <qqtKa-1nc-21@gated-at.bofh.it> <qqxkK-3Fq-13@gated-at.bofh.it>
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On Mon, 02 Nov 2015, Linus Torvalds wrote:

>On Mon, Nov 2, 2015 at 12:15 PM, Davidlohr Bueso <dave@stgolabs.net> wrote:
>>
>> So I ran some experiments on an IvyBridge (2.8GHz) and the cost of XCHG is
>> constantly cheaper (by at least half the latency) than MFENCE. While there
>> was a decent amount of variation, this difference remained rather constant.
>
>Mind testing "lock addq $0,0(%rsp)" instead of mfence? That's what we
>use on old cpu's without one (ie 32-bit).

I'm getting results very close to xchg.

>I'm not actually convinced that mfence is necessarily a good idea. I
>could easily see it being microcode, for example.

Interesting.

>
>At least on my Haswell, the "lock addq" is pretty much exactly half
>the cost of "mfence".

Ok, his coincides with my results on IvB.
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Re: [PATCH 3/4] x86,asm: Re-work smp_store_mb() Davidlohr Bueso <dave@stgolabs.net> - 2015-11-02 21:20 +0100
  Re: [PATCH 3/4] x86,asm: Re-work smp_store_mb() Linus Torvalds <torvalds@linux-foundation.org> - 2015-11-03 01:10 +0100
    Re: [PATCH 3/4] x86,asm: Re-work smp_store_mb() Davidlohr Bueso <dave@stgolabs.net> - 2015-11-03 02:40 +0100

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