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Groups > linux.kernel > #1259802
| From | Stephen Boyd <sboyd@codeaurora.org> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH 01/19] clk: sunxi: Add display clock |
| Date | 2015-10-30 22:30 +0100 |
| Message-ID | <qpppf-2vw-5@gated-at.bofh.it> (permalink) |
| References | <qpiQO-6Tg-7@gated-at.bofh.it> <qpiQP-6Tg-47@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On 10/30, Maxime Ripard wrote:
> diff --git a/drivers/clk/sunxi/clk-sun4i-display.c b/drivers/clk/sunxi/clk-sun4i-display.c
> new file mode 100644
> index 000000000000..f13b095c6d7a
> --- /dev/null
> +++ b/drivers/clk/sunxi/clk-sun4i-display.c
> @@ -0,0 +1,199 @@
> +/*
> + * Copyright 2015 Maxime Ripard
> + *
> + * Maxime Ripard <maxime.ripard@free-electrons.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
#include <linux/kernel.h> for container_of?
> +#include <linux/clk-provider.h>
> +#include <linux/of_address.h>
> +#include <linux/reset-controller.h>
> +#include <linux/slab.h>
> +#include <linux/spinlock.h>
> +
> +#define SUN4I_A10_DISPLAY_PARENTS 3
> +
> +#define SUN4I_A10_DISPLAY_GATE_BIT 31
> +#define SUN4I_A10_DISPLAY_RESET_BIT 30
> +#define SUN4I_A10_DISPLAY_MUX_MASK 3
> +#define SUN4I_A10_DISPLAY_MUX_SHIFT 24
> +#define SUN4I_A10_DISPLAY_DIV_WIDTH 4
> +#define SUN4I_A10_DISPLAY_DIV_SHIFT 0
> +
> +struct reset_data {
> + void __iomem *reg;
> + spinlock_t *lock;
> + struct reset_controller_dev rcdev;
> +};
> +
> +static DEFINE_SPINLOCK(sun4i_a10_display_lock);
> +
> +static int sun4i_a10_display_assert(struct reset_controller_dev *rcdev,
> + unsigned long id)
> +{
> + struct reset_data *data = container_of(rcdev,
> + struct reset_data,
> + rcdev);
Can this be a macro rcdev_to_reset_data() or something?
> + unsigned long flags;
[..]
> +
> +static int sun4i_a10_display_status(struct reset_controller_dev *rcdev,
> + unsigned long id)
> +{
> + struct reset_data *data = container_of(rcdev,
> + struct reset_data,
> + rcdev);
> +
> + return !(readl(data->reg) & BIT(SUN4I_A10_DISPLAY_RESET_BIT));
> +}
> +
> +static struct reset_control_ops sun4i_a10_display_reset_ops = {
Someone should make it so this can be const...
> + .assert = sun4i_a10_display_assert,
> + .deassert = sun4i_a10_display_deassert,
> + .status = sun4i_a10_display_status,
> +};
> +
> +static int sun4i_a10_display_reset_xlate(struct reset_controller_dev *rcdev,
> + const struct of_phandle_args *spec)
> +{
> + if (WARN_ON(spec->args_count != rcdev->of_reset_n_cells))
> + return -EINVAL;
Do we really need this check? Seems like something the reset core
should handle.
> +
> + /* We only have a single reset signal */
> + return 0;
> +}
> +
> +static void __init sun4i_a10_display_setup(struct device_node *node)
> +{
> + const char *parents[SUN4I_A10_DISPLAY_PARENTS];
> + const char *clk_name = node->name;
> + struct reset_data *reset_data;
> + struct clk_divider *div;
> + struct clk_gate *gate;
> + struct clk_mux *mux;
> + void __iomem *reg;
> + struct clk *clk;
> + int i;
> +
> + of_property_read_string(node, "clock-output-names", &clk_name);
> +
> + reg = of_io_request_and_map(node, 0, of_node_full_name(node));
> + if (IS_ERR(reg)) {
> + pr_err("%s: Could not map the clock registers\n", clk_name);
> + return;
> + }
> +
> + for (i = 0; i < SUN4I_A10_DISPLAY_PARENTS; i++)
> + parents[i] = of_clk_get_parent_name(node, i);
of_clk_parent_fill()?
> +
> + mux = kzalloc(sizeof(*mux), GFP_KERNEL);
> + if (!mux)
[..]
> + goto free_reset;
> + }
> +
> + return;
> +
> +free_reset:
> + kfree(reset_data);
> +free_clk:
> + clk_unregister(clk);
We really ought to have a clk_composite_unregister() API.
--
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[PATCH 00/19] drm: Add Allwinner A10 display engine support Maxime Ripard <maxime.ripard@free-electrons.com> - 2015-10-30 15:30 +0100
[PATCH 19/19] ARM: sun5i: chip: Enable the TV Encoder Maxime Ripard <maxime.ripard@free-electrons.com> - 2015-10-30 15:30 +0100
Re: [PATCH 19/19] ARM: sun5i: chip: Enable the TV Encoder Chen-Yu Tsai <wens@csie.org> - 2015-10-30 16:30 +0100
Re: [PATCH 19/19] ARM: sun5i: chip: Enable the TV Encoder Maxime Ripard <maxime.ripard@free-electrons.com> - 2015-11-06 20:40 +0100
[PATCH 03/19] clk: sunxi: Add TCON channel0 clock Maxime Ripard <maxime.ripard@free-electrons.com> - 2015-10-30 15:30 +0100
Re: [PATCH 03/19] clk: sunxi: Add TCON channel0 clock Chen-Yu Tsai <wens@csie.org> - 2015-10-31 11:30 +0100
Re: [PATCH 03/19] clk: sunxi: Add TCON channel0 clock Maxime Ripard <maxime.ripard@free-electrons.com> - 2015-11-06 23:20 +0100
[PATCH 02/19] clk: sunxi: Add PLL3 clock Maxime Ripard <maxime.ripard@free-electrons.com> - 2015-10-30 15:30 +0100
Re: [PATCH 02/19] clk: sunxi: Add PLL3 clock Stephen Boyd <sboyd@codeaurora.org> - 2015-10-30 22:40 +0100
[PATCH 06/19] clk: sunxi: Add Allwinner R8 AHB gates support Maxime Ripard <maxime.ripard@free-electrons.com> - 2015-10-30 15:30 +0100
Re: [PATCH 06/19] clk: sunxi: Add Allwinner R8 AHB gates support Chen-Yu Tsai <wens@csie.org> - 2015-10-30 17:10 +0100
Re: [PATCH 06/19] clk: sunxi: Add Allwinner R8 AHB gates support Hans de Goede <hdegoede@redhat.com> - 2015-10-30 17:40 +0100
[PATCH 09/19] drm: sun4i: Add DT bindings documentation Maxime Ripard <maxime.ripard@free-electrons.com> - 2015-10-30 15:30 +0100
Re: [PATCH 09/19] drm: sun4i: Add DT bindings documentation Rob Herring <robh@kernel.org> - 2015-10-30 17:50 +0100
Re: [PATCH 09/19] drm: sun4i: Add DT bindings documentation Thierry Reding <thierry.reding@gmail.com> - 2015-10-30 18:40 +0100
Re: [PATCH 09/19] drm: sun4i: Add DT bindings documentation Rob Herring <robh@kernel.org> - 2015-11-01 15:40 +0100
Re: [PATCH 09/19] drm: sun4i: Add DT bindings documentation Maxime Ripard <maxime.ripard@free-electrons.com> - 2015-11-06 23:40 +0100
[PATCH 18/19] ARM: sun5i: r8: Add AHB gates to the DTSI Maxime Ripard <maxime.ripard@free-electrons.com> - 2015-10-30 15:30 +0100
[PATCH 12/19] drm: sun4i: tv: Add PAL output standard Maxime Ripard <maxime.ripard@free-electrons.com> - 2015-10-30 15:30 +0100
[PATCH 10/19] drm: sun4i: Add RGB output Maxime Ripard <maxime.ripard@free-electrons.com> - 2015-10-30 15:30 +0100
[PATCH 15/19] ARM: sun5i: dt: Add display and TCON clocks Maxime Ripard <maxime.ripard@free-electrons.com> - 2015-10-30 15:30 +0100
[PATCH 16/19] ARM: sun5i: dt: Add DRAM gates Maxime Ripard <maxime.ripard@free-electrons.com> - 2015-10-30 15:30 +0100
[PATCH 11/19] drm: sun4i: Add composite output Maxime Ripard <maxime.ripard@free-electrons.com> - 2015-10-30 15:30 +0100
Re: [linux-sunxi] [PATCH 11/19] drm: sun4i: Add composite output Jonathan Liu <net147@gmail.com> - 2015-11-02 04:00 +0100
Re: [linux-sunxi] [PATCH 11/19] drm: sun4i: Add composite output Maxime Ripard <maxime.ripard@free-electrons.com> - 2015-11-07 01:40 +0100
[PATCH 07/19] drm/panel: simple: Add timings for the Olimex LCD-OLinuXino-4.3TS Maxime Ripard <maxime.ripard@free-electrons.com> - 2015-10-30 15:30 +0100
Re: [PATCH 07/19] drm/panel: simple: Add timings for the Olimex LCD-OLinuXino-4.3TS Thierry Reding <thierry.reding@gmail.com> - 2015-10-30 18:40 +0100
Re: [PATCH 07/19] drm/panel: simple: Add timings for the Olimex LCD-OLinuXino-4.3TS Maxime Ripard <maxime.ripard@free-electrons.com> - 2015-11-07 01:50 +0100
[PATCH 01/19] clk: sunxi: Add display clock Maxime Ripard <maxime.ripard@free-electrons.com> - 2015-10-30 15:30 +0100
Re: [PATCH 01/19] clk: sunxi: Add display clock Stephen Boyd <sboyd@codeaurora.org> - 2015-10-30 22:30 +0100
Re: [PATCH 01/19] clk: sunxi: Add display clock Maxime Ripard <maxime.ripard@free-electrons.com> - 2015-11-07 00:40 +0100
Re: [PATCH 01/19] clk: sunxi: Add display clock Stephen Boyd <sboyd@codeaurora.org> - 2015-11-12 21:40 +0100
Re: [PATCH 01/19] clk: sunxi: Add display clock Chen-Yu Tsai <wens@csie.org> - 2015-10-31 11:30 +0100
Re: [PATCH 01/19] clk: sunxi: Add display clock Maxime Ripard <maxime.ripard@free-electrons.com> - 2015-11-06 20:50 +0100
[PATCH 14/19] ARM: sun5i: dt: Add pll3 and pll7 clocks Maxime Ripard <maxime.ripard@free-electrons.com> - 2015-10-30 15:30 +0100
Re: [PATCH 14/19] ARM: sun5i: dt: Add pll3 and pll7 clocks Chen-Yu Tsai <wens@csie.org> - 2015-11-09 05:30 +0100
[PATCH 04/19] clk: sunxi: Add TCON channel1 clock Maxime Ripard <maxime.ripard@free-electrons.com> - 2015-10-30 15:30 +0100
Re: [PATCH 04/19] clk: sunxi: Add TCON channel1 clock Stephen Boyd <sboyd@codeaurora.org> - 2015-10-30 22:40 +0100
Re: [PATCH 04/19] clk: sunxi: Add TCON channel1 clock Maxime Ripard <maxime.ripard@free-electrons.com> - 2015-11-07 01:20 +0100
Re: [PATCH 04/19] clk: sunxi: Add TCON channel1 clock Chen-Yu Tsai <wens@csie.org> - 2015-10-31 11:00 +0100
Re: [PATCH 04/19] clk: sunxi: Add TCON channel1 clock Maxime Ripard <maxime.ripard@free-electrons.com> - 2015-11-07 01:10 +0100
Re: [PATCH 04/19] clk: sunxi: Add TCON channel1 clock Chen-Yu Tsai <wens@csie.org> - 2015-11-09 04:40 +0100
[PATCH 05/19] clk: sunxi: add DRAM gates Maxime Ripard <maxime.ripard@free-electrons.com> - 2015-10-30 15:30 +0100
Re: [PATCH 05/19] clk: sunxi: add DRAM gates Chen-Yu Tsai <wens@csie.org> - 2015-11-09 05:20 +0100
Re: [PATCH 05/19] clk: sunxi: add DRAM gates Chen-Yu Tsai <wens@csie.org> - 2015-11-13 09:10 +0100
[PATCH 13/19] drm: sun4i: tv: Add NTSC output standard Maxime Ripard <maxime.ripard@free-electrons.com> - 2015-10-30 15:30 +0100
[PATCH 17/19] ARM: sun5i: dt: Add display blocks to the DTSI Maxime Ripard <maxime.ripard@free-electrons.com> - 2015-10-30 15:30 +0100
Re: [PATCH 00/19] drm: Add Allwinner A10 display engine support Daniel Vetter <daniel@ffwll.ch> - 2015-10-30 16:10 +0100
Re: [PATCH 00/19] drm: Add Allwinner A10 display engine support Maxime Ripard <maxime.ripard@free-electrons.com> - 2015-11-12 06:20 +0100
Re: [PATCH 00/19] drm: Add Allwinner A10 display engine support Chen-Yu Tsai <wens@csie.org> - 2015-11-09 04:50 +0100
Re: [PATCH 08/19] drm: Add Allwinner A10 Display Engine support Maxime Ripard <maxime.ripard@free-electrons.com> - 2015-11-11 23:20 +0100
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