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|---|---|
| From | Jian Zhou <jianjay.zhou@huawei.com> |
| Newsgroups | linux.kernel |
| Subject | [PATCH v2 2/4] KVM: X86: LBR MSRs of supported CPU types |
| Date | Fri, 23 Oct 2015 11:00:03 +0200 |
| Message-ID | <qmGmD-4MY-13@gated-at.bofh.it> (permalink) |
| References | <qmGcW-4Bz-5@gated-at.bofh.it> |
| X-Original-To | <kvm@vger.kernel.org>, <pbonzini@redhat.com>, <gleb@kernel.org>, <tglx@linutronix.de>, <mingo@redhat.com>, <hpa@zytor.com>, <x86@kernel.org>, <linux-kernel@vger.kernel.org> |
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| Content-Type | text/plain |
| X-Originating-IP | [10.177.19.14] |
| X-Cfilter-Loop | Reflected |
| Sender | robomod@news.nic.it |
| List-ID | <linux-kernel.vger.kernel.org> |
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| Approved | robomod@news.nic.it |
| Lines | 56 |
| Organization | linux.* mail to news gateway |
| X-Original-Cc | <herongguang.he@huawei.com>, <zhang.zhanghailiang@huawei.com>, <weidong.huang@huawei.com>, <peter.huangpeng@huawei.com>, Jian Zhou <jianjay.zhou@huawei.com> |
| X-Original-Date | Fri, 23 Oct 2015 16:47:01 +0800 |
| X-Original-Message-ID | <1445590023-2012-3-git-send-email-jianjay.zhou@huawei.com> |
| X-Original-References | <1445590023-2012-1-git-send-email-jianjay.zhou@huawei.com> |
| X-Original-Sender | linux-kernel-owner@vger.kernel.org |
| Xref | csiph.com linux.kernel:1254405 |
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Macros about LBR MSRs. Signed-off-by: Jian Zhou <jianjay.zhou@huawei.com> Signed-off-by: Stephen He <herongguang.he@huawei.com> --- arch/x86/include/asm/msr-index.h | 26 ++++++++++++++++++++++++-- 1 file changed, 24 insertions(+), 2 deletions(-) diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index b98b471..2afcacd 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -68,10 +68,32 @@ #define MSR_LBR_SELECT 0x000001c8 #define MSR_LBR_TOS 0x000001c9 +#define MSR_LBR_CORE_FROM 0x00000040 +#define MSR_LBR_CORE_TO 0x00000060 +#define MAX_NUM_LBR_MSRS 128 +/* Pentium4/Xeon(based on NetBurst) LBR */ +#define MSR_PENTIUM4_LER_FROM_LIP 0x000001d7 +#define MSR_PENTIUM4_LER_TO_LIP 0x000001d8 +#define MSR_PENTIUM4_LBR_TOS 0x000001da +#define MSR_LBR_PENTIUM4_FROM 0x00000680 +#define MSR_LBR_PENTIUM4_TO 0x000006c0 +#define SIZE_PENTIUM4_LBR_STACK 16 +/* Core2 LBR */ +#define MSR_LBR_CORE2_FROM MSR_LBR_CORE_FROM +#define MSR_LBR_CORE2_TO MSR_LBR_CORE_TO +#define SIZE_CORE2_LBR_STACK 4 +/* Atom LBR */ +#define MSR_LBR_ATOM_FROM MSR_LBR_CORE_FROM +#define MSR_LBR_ATOM_TO MSR_LBR_CORE_TO +#define SIZE_ATOM_LBR_STACK 8 +/* Nehalem LBR */ #define MSR_LBR_NHM_FROM 0x00000680 #define MSR_LBR_NHM_TO 0x000006c0 -#define MSR_LBR_CORE_FROM 0x00000040 -#define MSR_LBR_CORE_TO 0x00000060 +#define SIZE_NHM_LBR_STACK 16 +/* Skylake LBR */ +#define MSR_LBR_SKYLAKE_FROM MSR_LBR_NHM_FROM +#define MSR_LBR_SKYLAKE_TO MSR_LBR_NHM_TO +#define SIZE_SKYLAKE_LBR_STACK 32 #define MSR_LBR_INFO_0 0x00000dc0 /* ... 0xddf for _31 */ #define LBR_INFO_MISPRED BIT_ULL(63) -- 1.7.12.4 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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[PATCH v2 0/4] KVM: VMX: enable LBR virtualization Jian Zhou <jianjay.zhou@huawei.com> - 2015-10-23 11:00 +0200 [PATCH v2 3/4] KVM: X86: Migration is supported Jian Zhou <jianjay.zhou@huawei.com> - 2015-10-23 11:00 +0200 [PATCH v2 2/4] KVM: X86: LBR MSRs of supported CPU types Jian Zhou <jianjay.zhou@huawei.com> - 2015-10-23 11:00 +0200
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