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Re: [PATCH 1/4] x86, perf: Use a new PMU ack sequence on Skylake

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* Peter Zijlstra <peterz@infradead.org> wrote:

> On Fri, Oct 16, 2015 at 06:35:14AM -0700, Andi Kleen wrote:
> > > > In principle the sequence should work on other CPUs too, but
> > > > since I only tested on Skylake it is only enabled there.
> > > 
> > > I would very much like a reduction of the ack states. You introduced the 
> > > late thing, which should also work for everyone, and now you introduce yet 
> > > another variant.
> > 
> > Ingo suggested to do it this way. Originally I thought it wasn't needed, but I 
> > think now that late-ack made some of the races that eventually caused Skylake 
> > LBR to fall over worse. So in hindsight it was a good idea to not use it 
> > everywhere.
> > 
> > > I would very much prefer a single ack scheme if at all possible.
> > 
> > Could enable it everywhere, but then users would need to test it on most types 
> > of CPUs, as I can't.
> 
> I think Mike still has a Core2 machine (and I might be able to dig out a 
> laptop), Ingo should have a NHM(-EP), I have SNB, IVB-EP, HSW. So if you could 
> test at least BDW and SKL we might have decent test coverage.
> 
> Ingo, do you want to first merge the safe patch and then clean up?

Yeah, would be nice to structure it that way, out of general paranoia.

Thanks,

	Ingo
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perf: Some improvements for Skylake perf Andi Kleen <andi@firstfloor.org> - 2015-10-16 01:40 +0200
  [PATCH 3/4] perf, x86: Use counter freezing with Arch Perfmon v4 Andi Kleen <andi@firstfloor.org> - 2015-10-16 01:40 +0200
  [PATCH 2/4] x86, perf: Factor out BTS enable/disable functions Andi Kleen <andi@firstfloor.org> - 2015-10-16 01:40 +0200
  [PATCH 4/4] x86, perf: Use INST_RETIRED.PREC_DIST for cycles:pp on Skylake Andi Kleen <andi@firstfloor.org> - 2015-10-16 01:40 +0200
  [PATCH 1/4] x86, perf: Use a new PMU ack sequence on Skylake Andi Kleen <andi@firstfloor.org> - 2015-10-16 01:40 +0200
    Re: [PATCH 1/4] x86, perf: Use a new PMU ack sequence on Skylake Peter Zijlstra <peterz@infradead.org> - 2015-10-16 14:00 +0200
      Re: [PATCH 1/4] x86, perf: Use a new PMU ack sequence on Skylake Andi Kleen <ak@linux.intel.com> - 2015-10-16 15:40 +0200
        Re: [PATCH 1/4] x86, perf: Use a new PMU ack sequence on Skylake Peter Zijlstra <peterz@infradead.org> - 2015-10-16 17:10 +0200
          Re: [PATCH 1/4] x86, perf: Use a new PMU ack sequence on Skylake Mike Galbraith <umgwanakikbuti@gmail.com> - 2015-10-16 18:20 +0200
          Re: [PATCH 1/4] x86, perf: Use a new PMU ack sequence on Skylake Ingo Molnar <mingo@kernel.org> - 2015-10-19 09:10 +0200

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