Re: [PATCH 3/4] thermal: rockchip: change the TSHUT default state

From	Caesar Wang <caesar.upstream@gmail.com>
Newsgroups	linux.kernel
Subject	Re: [PATCH 3/4] thermal: rockchip: change the TSHUT default state
Date	2015-10-21 04:20 +0200
Message-ID	<qlRap-5M9-1@gated-at.bofh.it> (permalink)
References	<qlBfk-7L2-3@gated-at.bofh.it> <qlBfl-7L2-37@gated-at.bofh.it> <qlHE6-fg-19@gated-at.bofh.it> <qlRap-5M9-3@gated-at.bofh.it> <qlRap-5M9-5@gated-at.bofh.it>
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Doug,

在 2015年10月21日 10:14, Doug Anderson 写道:
> Caesar,
>
> On Tue, Oct 20, 2015 at 6:47 PM, Caesar Wang <caesar.upstream@gmail.com> wrote:
>> Doug,
>>
>> 在 2015年10月21日 00:01, Doug Anderson 写道:
>>
>> Caesar,
>>
>> On Tue, Oct 20, 2015 at 2:11 AM, Caesar Wang <wxt@rock-chips.com> wrote:
>>
>> As the TRM says, the TSHUT default state is high active.
>> In general, the TSHUT state can get from the dts. Otherwise
>> it gets the state from this.
>>
>> Can you point at where the TRM says that the default state is high active?
>>
>> With the manual I have, I look at TSADC_AUTO_CON and I look at the
>> description of "Bit 8".  It says that "tshut polarity" is 0 for low
>> active and 1 for high active.  It then said that the Reset Value is 0.
>>
>> ...the "Reset Value" in tables like this is notoriously unreliable, so
>> I can totally believe that it's wrong.  If you can point me at the
>> part of the TRM that says that TSHUT is high active by default then I
>> can confirm that for you.  ;)
>>
>>
>> Okay, I know that's my wrong, the polarity is high or low can be selected.
>> :-(
>>
>> I remember the veyron why is the default HiGH active, since the opt is
>> connected to the PMIC.(we need think about the devices)
>>
>> Why is the evb board LOW active, since the opt didn't connected to the
>> devices. TSHUT is depend on the CRU to work.
> I think we can drop this patch then, right?  Any boards that need a
> change from the default can just set "rockchip,hw-tshut-polarity",
> right?
Yep, we should drop this patch.
I'm ready resend the patchs.


> -Doug
>

-- 
Thanks,
Caesar

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Thread

[PATCH 0/4]  Caesar Wang <wxt@rock-chips.com> - 2015-10-20 11:20 +0200
  [PATCH 1/4] dt-bindings: Sync the dts to this document Caesar Wang <wxt@rock-chips.com> - 2015-10-20 11:20 +0200
  Re: [PATCH 0/4] Add the OTP gpio pinctrl to fix the TSHUT issue Caesar Wang <caesar.upstream@gmail.com> - 2015-10-20 11:20 +0200
  [PATCH 3/4] thermal: rockchip: change the TSHUT default state Caesar Wang <wxt@rock-chips.com> - 2015-10-20 11:20 +0200
    Re: [PATCH 3/4] thermal: rockchip: change the TSHUT default state Doug Anderson <dianders@chromium.org> - 2015-10-20 18:10 +0200
      Re: [PATCH 3/4] thermal: rockchip: change the TSHUT default state Caesar Wang <caesar.upstream@gmail.com> - 2015-10-21 04:20 +0200
      Re: [PATCH 3/4] thermal: rockchip: change the TSHUT default state Doug Anderson <dianders@chromium.org> - 2015-10-21 04:20 +0200
  [PATCH 2/4] thermal: rockchip: ensure the otp state before resetting the controller Caesar Wang <wxt@rock-chips.com> - 2015-10-20 11:20 +0200
    Re: [PATCH 2/4] thermal: rockchip: ensure the otp state before  resetting the controller Doug Anderson <dianders@chromium.org> - 2015-10-20 18:00 +0200
      Re: [PATCH 2/4] thermal: rockchip: ensure the otp state before  resetting the controller Caesar Wang <caesar.upstream@gmail.com> - 2015-10-21 03:50 +0200
        Re: [PATCH 2/4] thermal: rockchip: ensure the otp state before  resetting the controller Linus Walleij <linus.walleij@linaro.org> - 2015-10-27 11:30 +0100
  [PATCH 4/4] ARM: dts: rockchip: Add the OTP gpio pinctrl Caesar Wang <wxt@rock-chips.com> - 2015-10-20 11:20 +0200

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