[PATCH v2 2/4] ARM: dts: berlin: add 2nd clock for BG2Q sdhci0 and sdhci1

From	Jisheng Zhang <jszhang@marvell.com>
Newsgroups	linux.kernel
Subject	[PATCH v2 2/4] ARM: dts: berlin: add 2nd clock for BG2Q sdhci0 and sdhci1
Date	2015-10-20 13:30 +0200
Message-ID	<qlDh8-2gq-11@gated-at.bofh.it> (permalink)
References	<qlDh8-2gq-5@gated-at.bofh.it>
Organization	linux.* mail to news gateway

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Add the optional 2nd clock for BG2Q's sdhci0 and sdhci1. This would let the
clock be disabled during runtime pm, so saves power a bit.

Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
---
 arch/arm/boot/dts/berlin2q.dtsi | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi
index 2cb07fa..71b5d5e 100644
--- a/arch/arm/boot/dts/berlin2q.dtsi
+++ b/arch/arm/boot/dts/berlin2q.dtsi
@@ -102,7 +102,8 @@
 		sdhci0: sdhci@ab0000 {
 			compatible = "mrvl,pxav3-mmc";
 			reg = <0xab0000 0x200>;
-			clocks = <&chip_clk CLKID_SDIO1XIN>;
+			clocks = <&chip_clk CLKID_SDIO1XIN>, <&chip_clk CLKID_SDIO>;
+			clock-names = "io", "core";
 			interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 			status = "disabled";
 		};
@@ -110,7 +111,8 @@
 		sdhci1: sdhci@ab0800 {
 			compatible = "mrvl,pxav3-mmc";
 			reg = <0xab0800 0x200>;
-			clocks = <&chip_clk CLKID_SDIO1XIN>;
+			clocks = <&chip_clk CLKID_SDIO1XIN>, <&chip_clk CLKID_SDIO>;
+			clock-names = "io", "core";
 			interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 			status = "disabled";
 		};
-- 
2.6.1

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[PATCH v2 2/4] ARM: dts: berlin: add 2nd clock for BG2Q sdhci0 and sdhci1 Jisheng Zhang <jszhang@marvell.com> - 2015-10-20 13:30 +0200

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