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[PATCH v2 06/14] dmaengine: edma: Get qDMA channel information from HW also

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Query the number of qDMA channels from CCCFG register.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
---
 drivers/dma/edma.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/dma/edma.c b/drivers/dma/edma.c
index eaf1f9e4bde0..ea851ab05c8e 100644
--- a/drivers/dma/edma.c
+++ b/drivers/dma/edma.c
@@ -107,6 +107,7 @@
 
 /* CCCFG register */
 #define GET_NUM_DMACH(x)	(x & 0x7) /* bits 0-2 */
+#define GET_NUM_QDMACH(x)	(x & 0x70 >> 4) /* bits 4-6 */
 #define GET_NUM_PAENTRY(x)	((x & 0x7000) >> 12) /* bits 12-14 */
 #define GET_NUM_EVQUE(x)	((x & 0x70000) >> 16) /* bits 16-18 */
 #define GET_NUM_REGN(x)		((x & 0x300000) >> 20) /* bits 20-21 */
@@ -220,6 +221,7 @@ struct edma_cc {
 
 	/* eDMA3 resource information */
 	unsigned			num_channels;
+	unsigned			num_qchannels;
 	unsigned			num_region;
 	unsigned			num_slots;
 	unsigned			num_tc;
@@ -1819,6 +1821,9 @@ static int edma_setup_from_hw(struct device *dev, struct edma_soc_info *pdata,
 	value = GET_NUM_DMACH(cccfg);
 	ecc->num_channels = BIT(value + 1);
 
+	value = GET_NUM_QDMACH(cccfg);
+	ecc->num_qchannels = value * 2;
+
 	value = GET_NUM_PAENTRY(cccfg);
 	ecc->num_slots = BIT(value + 4);
 
@@ -1830,6 +1835,7 @@ static int edma_setup_from_hw(struct device *dev, struct edma_soc_info *pdata,
 	dev_dbg(dev, "eDMA3 CC HW configuration (cccfg: 0x%08x):\n", cccfg);
 	dev_dbg(dev, "num_region: %u\n", ecc->num_region);
 	dev_dbg(dev, "num_channels: %u\n", ecc->num_channels);
+	dev_dbg(dev, "num_qchannels: %u\n", ecc->num_qchannels);
 	dev_dbg(dev, "num_slots: %u\n", ecc->num_slots);
 	dev_dbg(dev, "num_tc: %u\n", ecc->num_tc);
 	dev_dbg(dev, "chmap_exist: %s\n", ecc->chmap_exist ? "yes" : "no");
-- 
2.6.1

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[PATCH v2 00/14] dmaenigne: edma/ti-crossbar: fixes, new bindings Peter Ujfalusi <peter.ujfalusi@ti.com> - 2015-10-16 09:20 +0200
  [PATCH v2 03/14] dmaengine: edma: Simplify function parameter list for channel operations Peter Ujfalusi <peter.ujfalusi@ti.com> - 2015-10-16 09:20 +0200
  [PATCH v2 14/14] ARM: DTS: am437x: Use the new DT bindings for the eDMA3 Peter Ujfalusi <peter.ujfalusi@ti.com> - 2015-10-16 09:20 +0200
  [PATCH v2 11/14] dmaengine: Kconfig: edma: Select TI_DMA_CROSSBAR in case of ARCH_OMAP Peter Ujfalusi <peter.ujfalusi@ti.com> - 2015-10-16 09:20 +0200
  [PATCH v2 04/14] dmaengine: edma: Correct PaRAM access function names (_parm_ to _param_) Peter Ujfalusi <peter.ujfalusi@ti.com> - 2015-10-16 09:20 +0200
  [PATCH v2 06/14] dmaengine: edma: Get qDMA channel information from HW also Peter Ujfalusi <peter.ujfalusi@ti.com> - 2015-10-16 09:30 +0200
  [PATCH v2 08/14] dmaengine: edma: Do not allocate memory for edma_rsv_info in case of DT boot Peter Ujfalusi <peter.ujfalusi@ti.com> - 2015-10-16 09:30 +0200
  [PATCH v2 02/14] dmaengine: edma: Optimize memcpy operation Peter Ujfalusi <peter.ujfalusi@ti.com> - 2015-10-16 09:30 +0200
  [PATCH v2 10/14] dmaengine: ti-dma-crossbar: Add support for crossbar on AM33xx/AM43xx Peter Ujfalusi <peter.ujfalusi@ti.com> - 2015-10-16 09:30 +0200
  [PATCH v2 05/14] dmaengine: edma: Merge map_dmach_to_queue into assign_channel_eventq Peter Ujfalusi <peter.ujfalusi@ti.com> - 2015-10-16 09:30 +0200
  [PATCH v2 01/14] dmaengine: edma: Remove alignment constraint for memcpy Peter Ujfalusi <peter.ujfalusi@ti.com> - 2015-10-16 09:30 +0200
  [PATCH v2 09/14] dmaengine: edma: Merge the of parsing functions Peter Ujfalusi <peter.ujfalusi@ti.com> - 2015-10-16 09:30 +0200
  [PATCH v2 13/14] ARM: DTS: am33xx: Use the new DT bindings for the eDMA3 Peter Ujfalusi <peter.ujfalusi@ti.com> - 2015-10-16 09:30 +0200

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