[PATCH v1 2/2] ARM: dts: exynos5250: Add clocks to DISP1 domain

From	Tomeu Vizoso <tomeu.vizoso@collabora.com>
Newsgroups	linux.kernel
Subject	[PATCH v1 2/2] ARM: dts: exynos5250: Add clocks to DISP1 domain
Date	2015-10-14 12:50 +0200
Message-ID	<qjrN8-4ow-5@gated-at.bofh.it> (permalink)
References	<qjrN8-4ow-7@gated-at.bofh.it>
Organization	linux.* mail to news gateway

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Adds to the node of the DISP1 power domain the two clocks that need to
be reparented while the domain is powered off:
CLK_MOUT_ACLK200_DISP1_SUB and CLK_MOUT_ACLK300_DISP1_SUB.

Otherwise the state is unknown at power up and the mixer's clocks are
all messed up.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Link: http://lkml.kernel.org/g/561CDC33.7050103@collabora.com
---

 arch/arm/boot/dts/exynos5250.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index b24610ea8c2a..88b9cf5f226f 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -130,6 +130,10 @@
 		compatible = "samsung,exynos4210-pd";
 		reg = <0x100440A0 0x20>;
 		#power-domain-cells = <0>;
+		clocks = <&clock CLK_FIN_PLL>,
+			 <&clock CLK_MOUT_ACLK200_DISP1_SUB>,
+			 <&clock CLK_MOUT_ACLK300_DISP1_SUB>;
+		clock-names = "oscclk", "clk0", "clk1";
 	};
 
 	clock: clock-controller@10010000 {
-- 
2.5.0

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[PATCH v1 2/2] ARM: dts: exynos5250: Add clocks to DISP1 domain Tomeu Vizoso <tomeu.vizoso@collabora.com> - 2015-10-14 12:50 +0200
  Re: [PATCH v1 2/2] ARM: dts: exynos5250: Add clocks to DISP1 domain Krzysztof Kozlowski <k.kozlowski@samsung.com> - 2015-10-15 03:40 +0200

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