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Re: SoCFPGA ethernet broken

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On 10/15/2015 01:25 PM, Florian Fainelli wrote:
> On 15/10/15 12:59, Dinh Nguyen wrote:
>> On 10/15/2015 03:03 PM, Florian Fainelli wrote:
>>> On 15/10/15 12:09, Dinh Nguyen wrote:
>>>> Hi,
>>>>
>>>> commit "8b63ec1837fa phylib: Make PHYs children of their MDIO bus, not
>>>> the bus' parent." seems to have broken ethernet support for the SoCFPGA
>>>> platform which is using the stmmac ethernet driver.
>>>
>>> It is not clear to me how this relates to what you are seeing yet.
>>>
>>>>
>>>> It appears that during DHCP, it cannot get an IP address. This only
>>>> happens if ethernet was not used by the bootloader to tftp an kernel
>>>> image. If I use the bootloader to tftp an image then ethernet is working
>>>> fine. So I think the PHY is not getting enabled properly.
>>>>
>>>> If I revert this patch, then ethernet is back to working on the platform.
>>>
>>> Is the Device Tree source for this platform available somewhere to look at?
>>>
>>
>> Yes, I'm using the DTS that is in the mainline:
>>
>> arch/arm/boot/dts/socfpga.dtsi
>> arch/arm/boot/dts/socfpga_cyclone5.dtsi
>> arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
>
> There are no PHY devices in any of these DTS files, instead there is the
> non-standard "phy-addr" property which is set to 0xffffffff supposedly
> to indicate that the MDIO bus should be scanned. This is likely part of
> your problem. The stmmac driver seems to be looking for "snps,phy-addr"
> and not "phy-addr", so I am not even clear how this is supposed to work,
> and the driver mentions this custom property is deprecated anyway.
>

I think it is OK not to expose the PHYs in the device tree if they can 
be accurately probed without knowing information from the device tree.

> The core problem is in
> drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c::stmmac_mdio_register
> which manually detects the PHY, that is mostly fine, except that it does
> not really seem to work here for a reason that is still unclear to me.
>

I agree with this analysis.  I have also been looking at the code and 
cannot see anything that depends on what the parent device of the PHY 
is.  So it is a bit mystifying.


I noticed in your original message you had in the boot log this:

.
.
.
[    0.804992] libphy: stmmac: probed
[    0.808410] eth0: PHY ID 00221611 at 4 IRQ POLL (stmmac-0:04) active
.
.
.

Does this text change with and without the 8b63ec1837fa patch?
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Thread

Re: SoCFPGA ethernet broken Florian Fainelli <f.fainelli@gmail.com> - 2015-10-15 22:10 +0200
  Re: SoCFPGA ethernet broken Florian Fainelli <f.fainelli@gmail.com> - 2015-10-15 22:30 +0200
    Re: SoCFPGA ethernet broken David Daney <ddaney@caviumnetworks.com> - 2015-10-15 22:40 +0200
      Re: SoCFPGA ethernet broken Florian Fainelli <f.fainelli@gmail.com> - 2015-10-15 23:40 +0200
        Re: SoCFPGA ethernet broken Andrew Lunn <andrew@lunn.ch> - 2015-10-16 05:40 +0200
          Re: SoCFPGA ethernet broken Andrew Lunn <andrew@lunn.ch> - 2015-10-16 17:10 +0200
            Re: SoCFPGA ethernet broken Andrew Lunn <andrew@lunn.ch> - 2015-10-16 18:00 +0200
              Re: SoCFPGA ethernet broken Florian Fainelli <f.fainelli@gmail.com> - 2015-10-16 20:20 +0200
              Re: SoCFPGA ethernet broken Andrew Lunn <andrew@lunn.ch> - 2015-10-16 21:40 +0200
                Re: SoCFPGA ethernet broken Andrew Lunn <andrew@lunn.ch> - 2015-10-16 22:30 +0200
                Re: SoCFPGA ethernet broken David Daney <ddaney@caviumnetworks.com> - 2015-10-16 22:30 +0200

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