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Groups > linux.kernel > #1245207
| From | "Paul E. McKenney" <paulmck@linux.vnet.ibm.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [RFC v2 4/7] powerpc: atomic: Implement xchg_* and atomic{,64}_xchg_* variants |
| Date | 2015-10-13 01:30 +0200 |
| Message-ID | <qiUHv-5ti-7@gated-at.bofh.it> (permalink) |
| References | (2 earlier) <qeL9N-3Vj-25@gated-at.bofh.it> <qeNEC-8aM-17@gated-at.bofh.it> <qePGq-2Bk-27@gated-at.bofh.it> <qeQsO-3Lc-13@gated-at.bofh.it> <qizWp-se-5@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On Mon, Oct 12, 2015 at 09:17:50AM +0800, Boqun Feng wrote:
> Hi Paul,
>
> On Thu, Oct 01, 2015 at 11:03:01AM -0700, Paul E. McKenney wrote:
> > On Thu, Oct 01, 2015 at 07:13:04PM +0200, Peter Zijlstra wrote:
> > > On Thu, Oct 01, 2015 at 08:09:09AM -0700, Paul E. McKenney wrote:
> > > > On Thu, Oct 01, 2015 at 02:24:40PM +0200, Peter Zijlstra wrote:
> > >
> > > > > I must say I'm somewhat surprised by this level of relaxation, I had
> > > > > expected to only loose SMP barriers, not the program order ones.
> > > > >
> > > > > Is there a good argument for this?
> > > >
> > > > Yes, when we say "relaxed", we really mean relaxed. ;-)
> > > >
> > > > Both the CPU and the compiler are allowed to reorder around relaxed
> > > > operations.
> > >
> > > Is this documented somewhere, because I completely missed this part.
> >
> > Well, yes, these need to be added to the documentation. I am assuming
>
> Maybe it's good time for us to call it out which operation should be
> a compiler barrier or a CPU barrier?
>
> I had something in my mind while I was working on this series, not
> really sure whether it's correct, but probably a start point:
>
> All global and local atomic operations are at least atomic(no one can
> observe the middle state) and volatile(compilers can't optimize out the
> memory access). Based on this, there are four strictness levels, one
> can rely on them:
>
> RELAXED: neither a compiler barrier or a CPU barrier
> LOCAL: a compiler barrier
> PARTIAL: both a compiler barrier and a CPU barrier but not transitive
> FULL: both compiler barrier and a CPU barrier, and transitive.
As Will noted, we have two types of transitive. The first type is that
of release-acquire chains, where the transitivity is only observable
within the chain. The second type is that of smp_mb(), where the
transitivity is observable globally.
Thanx, Paul
> RELAXED includes all _relaxed variants and non-return atomics, LOCAL
> includes all local atomics(local_* and {cmp}xchg_local), PARTIAL
> includes _acquire and _release operations and FULL includes all fully
> ordered global atomic operations.
>
> Thoughts?
>
> Regards,
> Boqun
>
> > that Will is looking to have the same effect as C11 memory_order_relaxed,
> > which is relaxed in this sense. If he has something else in mind,
> > he needs to tell us what it is and why. ;-)
> >
> > Thanx, Paul
> >
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Re: [RFC v2 4/7] powerpc: atomic: Implement xchg_* and atomic{,64}_xchg_* variants Boqun Feng <boqun.feng@gmail.com> - 2015-10-12 03:20 +0200
Re: [RFC v2 4/7] powerpc: atomic: Implement xchg_* and atomic{,64}_xchg_* variants Will Deacon <will.deacon@arm.com> - 2015-10-12 11:30 +0200
Re: [RFC v2 4/7] powerpc: atomic: Implement xchg_* and atomic{,64}_xchg_* variants "Paul E. McKenney" <paulmck@linux.vnet.ibm.com> - 2015-10-13 01:30 +0200
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