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Re: [PATCH][v5] x86, suspend: Save/restore extra MSR registers for suspend

From "Rafael J. Wysocki" <rjw@rjwysocki.net>
Newsgroups linux.kernel
Subject Re: [PATCH][v5] x86, suspend: Save/restore extra MSR registers for suspend
Date 2015-10-12 20:50 +0200
Message-ID <qiQkz-7rT-59@gated-at.bofh.it> (permalink)
References <qifkZ-4ct-1@gated-at.bofh.it> <qiOiK-4vG-25@gated-at.bofh.it>
Organization linux.* mail to news gateway

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On Monday, October 12, 2015 06:37:50 PM Borislav Petkov wrote:
> On Sun, Oct 11, 2015 at 11:20:01AM +0800, Chen Yu wrote:
> > A bug is reported(https://bugzilla.redhat.com/show_bug.cgi?id=1227208)
> 
> I get:
> 
> "You are not authorized to access bug #1227208.
> 
> Most likely the bug has been restricted for internal development
> processes and we cannot grant access."
> 
> > that, after resumed from S3, CPU is running at a low speed.
> > After investigation, it is found that, BIOS has modified the value
> > of THERM_CONTROL register during S3, and changes it from 0 to 0x10
> > (thus changes the clock modulation from reserved to enabled),
> > since value of 0x10 means CPU can only get 25% of the Duty Cycle,
> > this triggers the problem.
> 
> Is this what the bug described above is? In any case, please remove the
> private bugzilla link and describe the bug in text here.
> 
> Also, from reading the other thread about the v4 patch, it sounds like
> intel_pstate can't handle the clock modulation properly, according to
> what Doug says.
> 
> So let's have this aspect sorted out properly first please before adding
> yet another ugly BIOS workaround.
> 
> Btw, why can't that BIOS be fixed instead?

Because it's been shipped to users.

Thanks,
Rafael

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Thread

[PATCH][v5] x86, suspend: Save/restore extra MSR registers for suspend Chen Yu <yu.c.chen@intel.com> - 2015-10-11 05:20 +0200
  Re: [PATCH][v5] x86, suspend: Save/restore extra MSR registers for  suspend Borislav Petkov <bp@suse.de> - 2015-10-12 18:40 +0200
    Re: [PATCH][v5] x86, suspend: Save/restore extra MSR registers for suspend "Rafael J. Wysocki" <rjw@rjwysocki.net> - 2015-10-12 20:50 +0200
    RE: [PATCH][v5] x86, suspend: Save/restore extra MSR registers for  suspend "Chen, Yu C" <yu.c.chen@intel.com> - 2015-10-14 19:50 +0200
  Re: [PATCH][v5] x86, suspend: Save/restore extra MSR registers for suspend "Rafael J. Wysocki" <rjw@rjwysocki.net> - 2015-10-12 20:50 +0200

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