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Groups > linux.kernel > #1242469
| From | Anshuman Khandual <khandual@linux.vnet.ibm.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH V9 12/28] powerpc, ptrace: Enable NT_PPC_TM_CTAR, NT_PPC_TM_CPPR, NT_PPC_TM_CDSCR |
| Date | 2015-10-08 17:00 +0200 |
| Message-ID | <qhkPM-6FW-17@gated-at.bofh.it> (permalink) |
| References | <qhkG5-6u9-5@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
This patch enables support for all three TM checkpointed SPR
states related ELF core note NT_PPC_TM_CTAR, NT_PPC_TM_CPPR,
NT_PPC_TM_CDSCR based ptrace requests through PTRACE_GETREGSET,
PTRACE_SETREGSET calls. This is achieved through adding three
new register sets REGSET_TM_CTAR, REGSET_TM_CPPR and
REGSET_TM_CDSCR in powerpc corresponding to the ELF core note
sections added. It implements the get, set and active functions
for all these new register sets added.
Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
---
arch/powerpc/kernel/ptrace.c | 178 +++++++++++++++++++++++++++++++++++++++++++
1 file changed, 178 insertions(+)
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index 787b514..45aa204 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -1541,6 +1541,151 @@ static int tm_spr_set(struct task_struct *target,
2 * sizeof(u64), 3 * sizeof(u64));
return ret;
}
+
+static int tm_tar_active(struct task_struct *target,
+ const struct user_regset *regset)
+{
+ if (!cpu_has_feature(CPU_FTR_TM))
+ return -ENODEV;
+
+ if (MSR_TM_ACTIVE(target->thread.regs->msr))
+ return regset->n;
+
+ return 0;
+}
+
+static int tm_tar_get(struct task_struct *target,
+ const struct user_regset *regset,
+ unsigned int pos, unsigned int count,
+ void *kbuf, void __user *ubuf)
+{
+ int ret;
+
+ if (!cpu_has_feature(CPU_FTR_TM))
+ return -ENODEV;
+
+ if (!MSR_TM_ACTIVE(target->thread.regs->msr))
+ return -ENODATA;
+
+ ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
+ &target->thread.tm_tar, 0, sizeof(u64));
+ return ret;
+}
+
+static int tm_tar_set(struct task_struct *target,
+ const struct user_regset *regset,
+ unsigned int pos, unsigned int count,
+ const void *kbuf, const void __user *ubuf)
+{
+ int ret;
+
+ if (!cpu_has_feature(CPU_FTR_TM))
+ return -ENODEV;
+
+ if (!MSR_TM_ACTIVE(target->thread.regs->msr))
+ return -ENODATA;
+
+ ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
+ &target->thread.tm_tar, 0, sizeof(u64));
+ return ret;
+}
+
+static int tm_ppr_active(struct task_struct *target,
+ const struct user_regset *regset)
+{
+ if (!cpu_has_feature(CPU_FTR_TM))
+ return -ENODEV;
+
+ if (MSR_TM_ACTIVE(target->thread.regs->msr))
+ return regset->n;
+
+ return 0;
+}
+
+
+static int tm_ppr_get(struct task_struct *target,
+ const struct user_regset *regset,
+ unsigned int pos, unsigned int count,
+ void *kbuf, void __user *ubuf)
+{
+ int ret;
+
+ if (!cpu_has_feature(CPU_FTR_TM))
+ return -ENODEV;
+
+ if (!MSR_TM_ACTIVE(target->thread.regs->msr))
+ return -ENODATA;
+
+ ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
+ &target->thread.tm_ppr, 0, sizeof(u64));
+ return ret;
+}
+
+static int tm_ppr_set(struct task_struct *target,
+ const struct user_regset *regset,
+ unsigned int pos, unsigned int count,
+ const void *kbuf, const void __user *ubuf)
+{
+ int ret;
+
+ if (!cpu_has_feature(CPU_FTR_TM))
+ return -ENODEV;
+
+ if (!MSR_TM_ACTIVE(target->thread.regs->msr))
+ return -ENODATA;
+
+ ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
+ &target->thread.tm_ppr, 0, sizeof(u64));
+ return ret;
+}
+
+static int tm_dscr_active(struct task_struct *target,
+ const struct user_regset *regset)
+{
+ if (!cpu_has_feature(CPU_FTR_TM))
+ return -ENODEV;
+
+ if (MSR_TM_ACTIVE(target->thread.regs->msr))
+ return regset->n;
+
+ return 0;
+}
+
+static int tm_dscr_get(struct task_struct *target,
+ const struct user_regset *regset,
+ unsigned int pos, unsigned int count,
+ void *kbuf, void __user *ubuf)
+{
+ int ret;
+
+ if (!cpu_has_feature(CPU_FTR_TM))
+ return -ENODEV;
+
+ if (!MSR_TM_ACTIVE(target->thread.regs->msr))
+ return -ENODATA;
+
+ ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
+ &target->thread.tm_dscr, 0, sizeof(u64));
+ return ret;
+}
+
+static int tm_dscr_set(struct task_struct *target,
+ const struct user_regset *regset,
+ unsigned int pos, unsigned int count,
+ const void *kbuf, const void __user *ubuf)
+{
+ int ret;
+
+ if (!cpu_has_feature(CPU_FTR_TM))
+ return -ENODEV;
+
+ if (!MSR_TM_ACTIVE(target->thread.regs->msr))
+ return -ENODATA;
+
+ ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
+ &target->thread.tm_dscr, 0, sizeof(u64));
+ return ret;
+}
#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
/*
@@ -1564,6 +1709,9 @@ enum powerpc_regset {
REGSET_TM_CVMX, /* TM checkpointed VMX registers */
REGSET_TM_CVSX, /* TM checkpointed VSX registers */
REGSET_TM_SPR, /* TM specific SPR registers */
+ REGSET_TM_CTAR, /* TM checkpointed TAR register */
+ REGSET_TM_CPPR, /* TM checkpointed PPR register */
+ REGSET_TM_CDSCR, /* TM checkpointed DSCR register */
#endif
};
@@ -1625,6 +1773,21 @@ static const struct user_regset native_regsets[] = {
.size = sizeof(u64), .align = sizeof(u64),
.active = tm_spr_active, .get = tm_spr_get, .set = tm_spr_set
},
+ [REGSET_TM_CTAR] = {
+ .core_note_type = NT_PPC_TM_CTAR, .n = 1,
+ .size = sizeof(u64), .align = sizeof(u64),
+ .active = tm_tar_active, .get = tm_tar_get, .set = tm_tar_set
+ },
+ [REGSET_TM_CPPR] = {
+ .core_note_type = NT_PPC_TM_CPPR, .n = 1,
+ .size = sizeof(u64), .align = sizeof(u64),
+ .active = tm_ppr_active, .get = tm_ppr_get, .set = tm_ppr_set
+ },
+ [REGSET_TM_CDSCR] = {
+ .core_note_type = NT_PPC_TM_CDSCR, .n = 1,
+ .size = sizeof(u64), .align = sizeof(u64),
+ .active = tm_dscr_active, .get = tm_dscr_get, .set = tm_dscr_set
+ },
#endif
};
@@ -1877,6 +2040,21 @@ static const struct user_regset compat_regsets[] = {
.size = sizeof(u64), .align = sizeof(u64),
.active = tm_spr_active, .get = tm_spr_get, .set = tm_spr_set
},
+ [REGSET_TM_CTAR] = {
+ .core_note_type = NT_PPC_TM_CTAR, .n = 1,
+ .size = sizeof(u64), .align = sizeof(u64),
+ .active = tm_tar_active, .get = tm_tar_get, .set = tm_tar_set
+ },
+ [REGSET_TM_CPPR] = {
+ .core_note_type = NT_PPC_TM_CPPR, .n = 1,
+ .size = sizeof(u64), .align = sizeof(u64),
+ .active = tm_ppr_active, .get = tm_ppr_get, .set = tm_ppr_set
+ },
+ [REGSET_TM_CDSCR] = {
+ .core_note_type = NT_PPC_TM_CDSCR, .n = 1,
+ .size = sizeof(u64), .align = sizeof(u64),
+ .active = tm_dscr_active, .get = tm_dscr_get, .set = tm_dscr_set
+ },
#endif
};
--
2.1.0
--
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[PATCH V9 00/28] Add new powerpc specific ELF core notes Anshuman Khandual <khandual@linux.vnet.ibm.com> - 2015-10-08 16:50 +0200 [PATCH V9 06/28] powerpc, ptrace: Adapt gpr32_get, gpr32_set functions for transaction Anshuman Khandual <khandual@linux.vnet.ibm.com> - 2015-10-08 16:50 +0200 [PATCH V9 09/28] powerpc, ptrace: Enable support for NT_PPC_CVMX Anshuman Khandual <khandual@linux.vnet.ibm.com> - 2015-10-08 16:50 +0200 [PATCH V9 01/28] elf: Add powerpc specific core note sections Anshuman Khandual <khandual@linux.vnet.ibm.com> - 2015-10-08 16:50 +0200 [PATCH V9 26/28] selftests, powerpc: Add ptrace tests for VSX, VMX registers in suspended TM Anshuman Khandual <khandual@linux.vnet.ibm.com> - 2015-10-08 17:00 +0200 [PATCH V9 16/28] selftests, powerpc: Add more SPR numbers, TM & VMX instructions to 'reg.h' Anshuman Khandual <khandual@linux.vnet.ibm.com> - 2015-10-08 17:00 +0200 [PATCH V9 28/28] selftests, powerpc: Add .gitignore file for ptrace executables Anshuman Khandual <khandual@linux.vnet.ibm.com> - 2015-10-08 17:00 +0200 [PATCH V9 17/28] selftests, powerpc: Add ptrace tests for EBB Anshuman Khandual <khandual@linux.vnet.ibm.com> - 2015-10-08 17:00 +0200 [PATCH V9 12/28] powerpc, ptrace: Enable NT_PPC_TM_CTAR, NT_PPC_TM_CPPR, NT_PPC_TM_CDSCR Anshuman Khandual <khandual@linux.vnet.ibm.com> - 2015-10-08 17:00 +0200 [PATCH V9 27/28] selftests, powerpc: Add ptrace tests for TM SPR registers Anshuman Khandual <khandual@linux.vnet.ibm.com> - 2015-10-08 17:00 +0200 [PATCH V9 08/28] powerpc, ptrace: Enable support for NT_PPC_CFPR Anshuman Khandual <khandual@linux.vnet.ibm.com> - 2015-10-08 17:00 +0200 [PATCH V9 11/28] powerpc, ptrace: Enable support for TM SPR state Anshuman Khandual <khandual@linux.vnet.ibm.com> - 2015-10-08 17:00 +0200 [PATCH V9 21/28] selftests, powerpc: Add ptrace tests for TAR, PPR, DSCR registers Anshuman Khandual <khandual@linux.vnet.ibm.com> - 2015-10-08 17:00 +0200 [PATCH V9 19/28] selftests, powerpc: Add ptrace tests for GPR/FPR registers in TM Anshuman Khandual <khandual@linux.vnet.ibm.com> - 2015-10-08 17:00 +0200 [PATCH V9 23/28] selftests, powerpc: Add ptrace tests for TAR, PPR, DSCR in suspended TM Anshuman Khandual <khandual@linux.vnet.ibm.com> - 2015-10-08 17:00 +0200 [PATCH V9 25/28] selftests, powerpc: Add ptrace tests for VSX, VMX registers in TM Anshuman Khandual <khandual@linux.vnet.ibm.com> - 2015-10-08 17:00 +0200 [PATCH V9 18/28] selftests, powerpc: Add ptrace tests for GPR/FPR registers Anshuman Khandual <khandual@linux.vnet.ibm.com> - 2015-10-08 17:00 +0200 [PATCH V9 13/28] powerpc, ptrace: Enable support for NT_PPPC_TAR, NT_PPC_PPR, NT_PPC_DSCR Anshuman Khandual <khandual@linux.vnet.ibm.com> - 2015-10-08 17:00 +0200 [PATCH V9 20/28] selftests, powerpc: Add ptrace tests for GPR/FPR registers in suspended TM Anshuman Khandual <khandual@linux.vnet.ibm.com> - 2015-10-08 17:00 +0200 [PATCH V9 22/28] selftests, powerpc: Add ptrace tests for TAR, PPR, DSCR in TM Anshuman Khandual <khandual@linux.vnet.ibm.com> - 2015-10-08 17:00 +0200 [PATCH V9 04/28] powerpc, ptrace: Enable in transaction NT_PPC_VMX ptrace requests Anshuman Khandual <khandual@linux.vnet.ibm.com> - 2015-10-08 17:00 +0200 [PATCH V9 24/28] selftests, powerpc: Add ptrace tests for VSX, VMX registers Anshuman Khandual <khandual@linux.vnet.ibm.com> - 2015-10-08 17:00 +0200 [PATCH V9 14/28] powerpc, ptrace: Enable support for EBB registers Anshuman Khandual <khandual@linux.vnet.ibm.com> - 2015-10-08 17:00 +0200 [PATCH V9 15/28] selftests, powerpc: Move 'reg.h' file outside of 'ebb' sub directory Anshuman Khandual <khandual@linux.vnet.ibm.com> - 2015-10-08 17:00 +0200
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