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[PATCH v2 18/22] arm64: Add helper to decode register from instruction

From "Suzuki K. Poulose" <suzuki.poulose@arm.com>
Newsgroups linux.kernel
Subject [PATCH v2 18/22] arm64: Add helper to decode register from instruction
Date 2015-10-05 19:10 +0200
Message-ID <qghqY-5ar-57@gated-at.bofh.it> (permalink)
References <qghqV-5ar-3@gated-at.bofh.it>
Organization linux.* mail to news gateway

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Add a helper to extract the register field from a given
instruction.

Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com>
---
 arch/arm64/include/asm/insn.h |    2 ++
 arch/arm64/kernel/insn.c      |   29 +++++++++++++++++++++++++++++
 2 files changed, 31 insertions(+)

diff --git a/arch/arm64/include/asm/insn.h b/arch/arm64/include/asm/insn.h
index 30e50eb..6dea3bc 100644
--- a/arch/arm64/include/asm/insn.h
+++ b/arch/arm64/include/asm/insn.h
@@ -289,6 +289,8 @@ enum aarch64_insn_encoding_class aarch64_get_insn_class(u32 insn);
 u64 aarch64_insn_decode_immediate(enum aarch64_insn_imm_type type, u32 insn);
 u32 aarch64_insn_encode_immediate(enum aarch64_insn_imm_type type,
 				  u32 insn, u64 imm);
+u32 aarch64_insn_decode_register(enum aarch64_insn_register_type type,
+					 u32 insn);
 u32 aarch64_insn_gen_branch_imm(unsigned long pc, unsigned long addr,
 				enum aarch64_insn_branch_type type);
 u32 aarch64_insn_gen_comp_branch_imm(unsigned long pc, unsigned long addr,
diff --git a/arch/arm64/kernel/insn.c b/arch/arm64/kernel/insn.c
index f341866..4286fed 100644
--- a/arch/arm64/kernel/insn.c
+++ b/arch/arm64/kernel/insn.c
@@ -388,6 +388,35 @@ u32 __kprobes aarch64_insn_encode_immediate(enum aarch64_insn_imm_type type,
 	return insn;
 }
 
+u32 aarch64_insn_decode_register(enum aarch64_insn_register_type type,
+					u32 insn)
+{
+	int shift;
+
+	switch (type) {
+	case AARCH64_INSN_REGTYPE_RT:
+	case AARCH64_INSN_REGTYPE_RD:
+		shift = 0;
+		break;
+	case AARCH64_INSN_REGTYPE_RN:
+		shift = 5;
+		break;
+	case AARCH64_INSN_REGTYPE_RT2:
+	case AARCH64_INSN_REGTYPE_RA:
+		shift = 10;
+		break;
+	case AARCH64_INSN_REGTYPE_RM:
+		shift = 16;
+		break;
+	default:
+		pr_err("%s: unknown register type encoding %d\n", __func__,
+		       type);
+		return 0;
+	}
+
+	return (insn >> shift) & GENMASK(4, 0);
+}
+
 static u32 aarch64_insn_encode_register(enum aarch64_insn_register_type type,
 					u32 insn,
 					enum aarch64_insn_register reg)
-- 
1.7.9.5

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[PATCH v2 00/22] arm64: Consolidate CPU feature handling "Suzuki K. Poulose" <suzuki.poulose@arm.com> - 2015-10-05 19:10 +0200
  [PATCH v2 15/22] arm64: Move FP/ASIMD hwcap handling to common code "Suzuki K. Poulose" <suzuki.poulose@arm.com> - 2015-10-05 19:10 +0200
  [PATCH v2 05/22] arm64: Move /proc/cpuinfo handling code "Suzuki K. Poulose" <suzuki.poulose@arm.com> - 2015-10-05 19:10 +0200
  [PATCH v2 16/22] arm64/debug: Make use of the system wide safe value "Suzuki K. Poulose" <suzuki.poulose@arm.com> - 2015-10-05 19:10 +0200
    Re: [PATCH v2 16/22] arm64/debug: Make use of the system wide safe  value Catalin Marinas <catalin.marinas@arm.com> - 2015-10-08 13:20 +0200
      Re: [PATCH v2 16/22] arm64/debug: Make use of the system wide safe  value "Suzuki K. Poulose" <Suzuki.Poulose@arm.com> - 2015-10-08 14:00 +0200
        Re: [PATCH v2 16/22] arm64/debug: Make use of the system wide safe  value Catalin Marinas <catalin.marinas@arm.com> - 2015-10-08 17:10 +0200
          Re: [PATCH v2 16/22] arm64/debug: Make use of the system wide safe  value "Suzuki K. Poulose" <Suzuki.Poulose@arm.com> - 2015-10-08 18:00 +0200
  [PATCH v2 14/22] arm64: Cleanup HWCAP handling "Suzuki K. Poulose" <suzuki.poulose@arm.com> - 2015-10-05 19:10 +0200
    Re: [PATCH v2 14/22] arm64: Cleanup HWCAP handling Russell King - ARM Linux <linux@arm.linux.org.uk> - 2015-10-08 13:20 +0200
      Re: [PATCH v2 14/22] arm64: Cleanup HWCAP handling Catalin Marinas <catalin.marinas@arm.com> - 2015-10-08 15:10 +0200
        Re: [PATCH v2 14/22] arm64: Cleanup HWCAP handling Edward Nevill <edward.nevill@linaro.org> - 2015-10-08 17:00 +0200
    Re: [PATCH v2 14/22] arm64: Cleanup HWCAP handling Catalin Marinas <catalin.marinas@arm.com> - 2015-10-08 13:20 +0200
  [PATCH v2 18/22] arm64: Add helper to decode register from instruction "Suzuki K. Poulose" <suzuki.poulose@arm.com> - 2015-10-05 19:10 +0200
  [PATCH v2 02/22] arm64: Delay ELF HWCAP initialisation until all CPUs are up "Suzuki K. Poulose" <suzuki.poulose@arm.com> - 2015-10-05 19:10 +0200
  [PATCH v2 17/22] arm64/kvm: Make use of the system wide safe values "Suzuki K. Poulose" <suzuki.poulose@arm.com> - 2015-10-05 19:10 +0200
    Re: [PATCH v2 17/22] arm64/kvm: Make use of the system wide safe  values Christoffer Dall <christoffer.dall@linaro.org> - 2015-10-10 17:20 +0200
  [PATCH v2 11/22] arm64: Populate cpuinfo after notify_cpu_starting "Suzuki K. Poulose" <suzuki.poulose@arm.com> - 2015-10-05 19:10 +0200
    Re: [PATCH v2 11/22] arm64: Populate cpuinfo after  notify_cpu_starting Catalin Marinas <catalin.marinas@arm.com> - 2015-10-08 12:20 +0200
      Re: [PATCH v2 11/22] arm64: Populate cpuinfo after  notify_cpu_starting "Suzuki K. Poulose" <Suzuki.Poulose@arm.com> - 2015-10-08 12:50 +0200
        Re: [PATCH v2 11/22] arm64: Populate cpuinfo after  notify_cpu_starting "Suzuki K. Poulose" <Suzuki.Poulose@arm.com> - 2015-10-09 17:10 +0200
  [PATCH v2 01/22] arm64: Make the CPU information more clear "Suzuki K. Poulose" <suzuki.poulose@arm.com> - 2015-10-05 19:20 +0200

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