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Re: [RFC PATCH 01/20] coresight: etm3x: splitting 'etm_enable_hw()' operations

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Mathieu Poirier <mathieu.poirier@linaro.org> writes:

> On 30 September 2015 at 03:58, Alexander Shishkin
> <alexander.shishkin@linux.intel.com> wrote:
>> Most of these things can also be bypassed, as at least initially perf
>> events won't be using trigger/sequencer configurations, so we could
>> simply clear all these things out when a first perf event is created
>> (which would also disallow any sysfs poking around the etm/etb) and not
>> worry about them in the pmu callbacks.
>
> I don't want to restrain configuration options to what is available
> through Perf's cmd line.  The sysFS interface is there to complement
> what is currently not available.

In practice this means that part of your trace configuration will be
global and part -- per event, which can indeed work if you only have one
event at a time, but again, makes using perf infrastructure redundant
for this driver. For multiple events this doesn't make much sense.

Regards,
--
Alex
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Re: [RFC PATCH 01/20] coresight: etm3x: splitting 'etm_enable_hw()' operations Alexander Shishkin <alexander.shishkin@linux.intel.com> - 2015-09-30 12:00 +0200
  Re: [RFC PATCH 01/20] coresight: etm3x: splitting 'etm_enable_hw()' operations Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-10-02 00:30 +0200
    Re: [RFC PATCH 01/20] coresight: etm3x: splitting 'etm_enable_hw()' operations Alexander Shishkin <alexander.shishkin@linux.intel.com> - 2015-10-02 06:50 +0200

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