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Re: [RFC PATCH 2/3] memory: tegra: add TLB cache line size

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On Tue, Sep 29, 2015 at 6:43 PM, Thierry Reding
<thierry.reding@gmail.com> wrote:
> On Tue, Sep 29, 2015 at 02:25:25PM +0900, Tomasz Figa wrote:
>> From: Vince Hsu <vince.h@nvidia.com>
>>
>> This patch adds SMMU line size to Tegra SoC data struct to enable SMMU
>> driver to use this knowledge in code added by further patch.
>
> I think the line size should either be added in the same patch that adds
> the feature which uses it, or the commit message should describe what
> purpose it will be used for. As it is this commit message leaves too
> many questions unanswered.

100% agreed. Anyway I just put this patch in this RFC quickly so that
the whole series can be applied and tested in somebody wants to do so.
I'll update commit message in next version.

>
>> Also add the missing TLB line number for Tegra124.
>>
>> Signed-off-by: Vince Hsu <vince.h@nvidia.com>
>> [tfiga@chromium.org: Rebased, revised commit message.]
>> Signed-off-by: Tomasz Figa <tfiga@chromium.org>
>
>> diff --git a/drivers/memory/tegra/tegra124.c b/drivers/memory/tegra/tegra124.c
>> index 21e7255..ff12487 100644
>> --- a/drivers/memory/tegra/tegra124.c
>> +++ b/drivers/memory/tegra/tegra124.c
>> @@ -1007,6 +1007,8 @@ static const struct tegra_smmu_soc tegra124_smmu_soc = {
>>       .num_swgroups = ARRAY_SIZE(tegra124_swgroups),
>>       .supports_round_robin_arbitration = true,
>>       .supports_request_limit = true,
>> +     .num_tlb_lines = 32,
>> +     .tlb_line_size = 32,
>>       .num_asids = 128,
>>  };
>
> Oh my... try to fix one platform and break another. Fortunately it seems
> like Tegra124 copes much better without TLB because I'm not seeing any
> buffer underruns or similar on Tegra124 without this fix.
>
> Anyway, this change is completely unrelated and fixes a regression (even
> though it might not be noticeable in many use-cases), so can you please
> split it out into a separate patch and add a
>
>         Fixes: 11cec15bf3fb ("iommu/tegra-smmu: Parameterize number of TLB lines")
>
> line to it? That patch went into v4.3-rc1 and it'd be nice to get this
> fix in before the final v4.3. Feel free to add my Acked-by/Reviewed-by
> as well.

Sounds good to me. We also have a patch adding locking around page
table get/put in map/unmap, which fixes a race between concurrent maps
and unmaps within the same page table. I'll send both soon.

Best regards,
Tomasz
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[RFC PATCH 2/3] memory: tegra: add TLB cache line size Tomasz Figa <tfiga@chromium.org> - 2015-09-29 07:30 +0200
  Re: [RFC PATCH 2/3] memory: tegra: add TLB cache line size Thierry Reding <thierry.reding@gmail.com> - 2015-09-29 11:50 +0200
    Re: [RFC PATCH 2/3] memory: tegra: add TLB cache line size Tomasz Figa <tfiga@chromium.org> - 2015-09-29 14:30 +0200

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