Re: [PATCH v2 00/11] Hi Maxime / Patrice / Srini,

From	Lee Jones <lee.jones@linaro.org>
Newsgroups	linux.kernel
Subject	Re: [PATCH v2 00/11] Hi Maxime / Patrice / Srini,
Date	2015-09-28 17:50 +0200
Message-ID	<qdIQF-3Jd-7@gated-at.bofh.it> (permalink)
References	<qdFSN-5O5-3@gated-at.bofh.it> <qdIH0-3xT-5@gated-at.bofh.it>
Organization	linux.* mail to news gateway

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On Mon, 28 Sep 2015, Lee Jones wrote:

> On Mon, 28 Sep 2015, Peter Griffin wrote:
> 
> > This series makes a series of updates to the stih407 pinctrl groups
> > and makes the upstream kernel more closely aligned in terms of pin
> > configuration to the vendor kernel.
> > 
> > A number of new periphs are added such as spi fsm, nand, cec0, and
> > for others such as SPI the various alternate function pin muxings have
> > been added. Finally for SPI the controller nodes have been updated
> > to have the default pin assignment in the controller node.
> > 
> > Changes since v1:
> >  - Rebase on v4.3-rc3
> >  - Remove some SoBs (Lee)
> >  - Collect up Acks
> > 
> > kind regards,
> > 
> > Peter.
> > 
> > Peter Griffin (11):
> >   ARM: STi: DT: STiH407: Add a cec0 pin definition
> >   ARM: STi: DT: STiH407: Add i2c3 alternate pin configs
> >   ARM: DT: STiH407: Add SPI 3 wire and 4 wire pinctrl configs
> >   ARM: DT: STiH407: Add serial3 pinctrl configuration
> >   ARM: DT: STiH407: Add SPI FSM (NOR Flash) Controller pin config
> >   ARM: DT: STiH407: Add NAND flash controller pin configuration
> >   ARM: DT: STiH407: Add systrace pin configuration
> >   ARM: DT: STiH407: Add SD pinctrl config for mmc0 controller
> >   ARM: DT: STiH407: Add pinconfig for IRB UHF and IRB TX
> >   ARM: DT: STiH407: Add RMII pinctrl support
> >   ARM: STi: STiH407: Add spi default pinctrl groups.
> > 
> >  arch/arm/boot/dts/stih407-family.dtsi  |  14 ++
> >  arch/arm/boot/dts/stih407-pinctrl.dtsi | 378 ++++++++++++++++++++++++++++++++-
> >  2 files changed, 387 insertions(+), 5 deletions(-)
> 
> I'll do this privately, so as not to unnecessarily delay the
> acceptance of the set.

Whoops!  Fingers faster than brain.  Sorry folks.

Maxime,
  Please do not slow up the acceptance of this set due to my comments.

> I'm a big fan of keeping the *-by's in chronological order.  It does
> help to provide an insight to the history of the patch.


-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
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Thread

[PATCH v2 00/11] Hi Maxime / Patrice / Srini, Peter Griffin <peter.griffin@linaro.org> - 2015-09-28 14:40 +0200
  [PATCH v2 06/11] ARM: DT: STiH407: Add NAND flash controller pin configuration Peter Griffin <peter.griffin@linaro.org> - 2015-09-28 14:40 +0200
  [PATCH v2 04/11] ARM: DT: STiH407: Add serial3 pinctrl configuration Peter Griffin <peter.griffin@linaro.org> - 2015-09-28 14:40 +0200
  [PATCH v2 03/11] ARM: DT: STiH407: Add SPI 3 wire and 4 wire pinctrl configs Peter Griffin <peter.griffin@linaro.org> - 2015-09-28 14:40 +0200
  [PATCH v2 05/11] ARM: DT: STiH407: Add SPI FSM (NOR Flash) Controller pin config Peter Griffin <peter.griffin@linaro.org> - 2015-09-28 14:40 +0200
  [PATCH v2 09/11] ARM: DT: STiH407: Add pinconfig for IRB UHF and IRB TX Peter Griffin <peter.griffin@linaro.org> - 2015-09-28 14:50 +0200
  [PATCH v2 02/11] ARM: STi: DT: STiH407: Add i2c3 alternate pin configs Peter Griffin <peter.griffin@linaro.org> - 2015-09-28 14:50 +0200
  Re: [PATCH v2 00/11] Hi Maxime / Patrice / Srini, Lee Jones <lee.jones@linaro.org> - 2015-09-28 17:40 +0200
    Re: [PATCH v2 00/11] Hi Maxime / Patrice / Srini, Lee Jones <lee.jones@linaro.org> - 2015-09-28 17:50 +0200
  Re: [PATCH v2 00/11] Hi Maxime / Patrice / Srini, Maxime Coquelin <maxime.coquelin@st.com> - 2015-09-30 10:40 +0200

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