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Groups > linux.kernel > #1230019
| From | Peter Ujfalusi <peter.ujfalusi@ti.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH v3 21/24] dmaengine: edma: Simplify and optimize ccerr interrupt handler |
| Date | 2015-09-22 12:00 +0200 |
| Message-ID | <qbswG-1Ms-19@gated-at.bofh.it> (permalink) |
| References | <qbswF-1Ms-3@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
No need to run through the bits in QEMR and CCERR events since they will
not trigger any action, so just clearing the errors there is fine.
In case of the missed event the loop can be optimized so we spend less time
to handle the event.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
---
drivers/dma/edma.c | 64 ++++++++++++++++++++----------------------------------
1 file changed, 23 insertions(+), 41 deletions(-)
diff --git a/drivers/dma/edma.c b/drivers/dma/edma.c
index 30e3c54d86e3..c8350248c0c6 100644
--- a/drivers/dma/edma.c
+++ b/drivers/dma/edma.c
@@ -1625,6 +1625,7 @@ static irqreturn_t dma_ccerr_handler(int irq, void *data)
int i;
int ctlr;
unsigned int cnt = 0;
+ unsigned int val;
ctlr = ecc->id;
if (ctlr < 0)
@@ -1637,54 +1638,35 @@ static irqreturn_t dma_ccerr_handler(int irq, void *data)
while (1) {
int j = -1;
- if (edma_read_array(ecc, EDMA_EMR, 0))
+ if ((val = edma_read_array(ecc, EDMA_EMR, 0)))
j = 0;
- else if (edma_read_array(ecc, EDMA_EMR, 1))
+ else if ((val = edma_read_array(ecc, EDMA_EMR, 1)))
j = 1;
if (j >= 0) {
- dev_dbg(ecc->dev, "EMR%d %08x\n", j,
- edma_read_array(ecc, EDMA_EMR, j));
- for (i = 0; i < 32; i++) {
+ unsigned long emr = val;
+
+ dev_dbg(ecc->dev, "EMR%d 0x%08x\n", j, val);
+ for (i = find_next_bit(&emr, 32, 0); i < 32;
+ i = find_next_bit(&emr, 32, i + 1)) {
int k = (j << 5) + i;
- if (edma_read_array(ecc, EDMA_EMR, j) &
- BIT(i)) {
- /* Clear the corresponding EMR bits */
- edma_write_array(ecc, EDMA_EMCR, j,
+ /* Clear the corresponding EMR bits */
+ edma_write_array(ecc, EDMA_EMCR, j, BIT(i));
+ /* Clear any SER */
+ edma_shadow0_write_array(ecc, SH_SECR, j,
BIT(i));
- /* Clear any SER */
- edma_shadow0_write_array(ecc, SH_SECR,
- j, BIT(i));
- edma_error_handler(&ecc->slave_chans[k]);
- }
- }
- } else if (edma_read(ecc, EDMA_QEMR)) {
- dev_dbg(ecc->dev, "QEMR %02x\n",
- edma_read(ecc, EDMA_QEMR));
- for (i = 0; i < 8; i++) {
- if (edma_read(ecc, EDMA_QEMR) & BIT(i)) {
- /* Clear the corresponding IPR bits */
- edma_write(ecc, EDMA_QEMCR, BIT(i));
- edma_shadow0_write(ecc, SH_QSECR,
- BIT(i));
-
- /* NOTE: not reported!! */
- }
- }
- } else if (edma_read(ecc, EDMA_CCERR)) {
- dev_dbg(ecc->dev, "CCERR %08x\n",
- edma_read(ecc, EDMA_CCERR));
- /* FIXME: CCERR.BIT(16) ignored! much better
- * to just write CCERRCLR with CCERR value...
- */
- for (i = 0; i < 8; i++) {
- if (edma_read(ecc, EDMA_CCERR) & BIT(i)) {
- /* Clear the corresponding IPR bits */
- edma_write(ecc, EDMA_CCERRCLR, BIT(i));
-
- /* NOTE: not reported!! */
- }
+ edma_error_handler(&ecc->slave_chans[k]);
}
+ } else if ((val = edma_read(ecc, EDMA_QEMR))) {
+ dev_dbg(ecc->dev, "QEMR 0x%02x\n", val);
+ /* Not reported, just clear the interrupt reason. */
+ edma_write(ecc, EDMA_QEMCR, val);
+ edma_shadow0_write(ecc, SH_QSECR, val);
+ } else if ((val = edma_read(ecc, EDMA_CCERR))) {
+ dev_warn(ecc->dev, "CCERR 0x%08x\n", val);
+ /* Not reported, just clear the interrupt reason. */
+ edma_write(ecc, EDMA_CCERRCLR, val);
}
+
if (!edma_error_pending(ecc))
break;
cnt++;
--
2.5.2
--
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[PATCH v3 00/24] dmaengine/ARM: Merge the edma drivers into one Peter Ujfalusi <peter.ujfalusi@ti.com> - 2015-09-22 12:00 +0200
[PATCH v3 13/24] dmaengine: edma: Use devm_kcalloc when possible Peter Ujfalusi <peter.ujfalusi@ti.com> - 2015-09-22 12:00 +0200
[PATCH v3 04/24] ARM: davinci/common: Convert edma driver to handle one eDMA instance per driver Peter Ujfalusi <peter.ujfalusi@ti.com> - 2015-09-22 12:00 +0200
[PATCH v3 03/24] dmaengine: edma: Simplify and optimize the edma_execute path Peter Ujfalusi <peter.ujfalusi@ti.com> - 2015-09-22 12:00 +0200
[PATCH v3 21/24] dmaengine: edma: Simplify and optimize ccerr interrupt handler Peter Ujfalusi <peter.ujfalusi@ti.com> - 2015-09-22 12:00 +0200
[PATCH v3 06/24] ARM: common: edma: Internal API to use pointer to 'struct edma' Peter Ujfalusi <peter.ujfalusi@ti.com> - 2015-09-22 12:00 +0200
[PATCH v3 18/24] dmaengine: edma: Consolidate the comments for functions Peter Ujfalusi <peter.ujfalusi@ti.com> - 2015-09-22 12:00 +0200
[PATCH v3 17/24] dmaengine: edma: Print warning when linking slots from different eDMA Peter Ujfalusi <peter.ujfalusi@ti.com> - 2015-09-22 12:00 +0200
[PATCH v3 20/24] dmaengine: edma: Move the pending error check into helper function Peter Ujfalusi <peter.ujfalusi@ti.com> - 2015-09-22 12:00 +0200
[PATCH v3 15/24] dmaengine: edma: Use dev_dbg instead pr_debug Peter Ujfalusi <peter.ujfalusi@ti.com> - 2015-09-22 12:00 +0200
[PATCH v3 23/24] dmaengine: edma: Rename bitfields for slot and channel usage tracking Peter Ujfalusi <peter.ujfalusi@ti.com> - 2015-09-22 12:00 +0200
[PATCH v3 24/24] dmaengine: edma: Dynamic paRAM slot handling if HW supports it Peter Ujfalusi <peter.ujfalusi@ti.com> - 2015-09-22 12:00 +0200
[PATCH v3 19/24] dmaengine: edma: Simplify the interrupt handling Peter Ujfalusi <peter.ujfalusi@ti.com> - 2015-09-22 12:00 +0200
[PATCH v3 22/24] dmaengine: edma: Read channel mapping support only once from HW Peter Ujfalusi <peter.ujfalusi@ti.com> - 2015-09-22 12:00 +0200
[PATCH v3 07/24] ARM/dmaengine: edma: Public API to use private struct pointer Peter Ujfalusi <peter.ujfalusi@ti.com> - 2015-09-22 12:00 +0200
[PATCH v3 02/24] ARM: common: edma: Remove unused functions Peter Ujfalusi <peter.ujfalusi@ti.com> - 2015-09-22 12:10 +0200
[PATCH v3 09/24] ARM: davinci: Use platform_device_register_full() to create pdev for eDMA Peter Ujfalusi <peter.ujfalusi@ti.com> - 2015-09-22 12:10 +0200
[PATCH v3 01/24] ARM: common: edma: Fix channel parameter for irq callbacks Peter Ujfalusi <peter.ujfalusi@ti.com> - 2015-09-22 12:10 +0200
[PATCH v3 11/24] dmaengine: edma: Allocate memory dynamically for bitmaps and structures Peter Ujfalusi <peter.ujfalusi@ti.com> - 2015-09-22 12:10 +0200
[PATCH v3 12/24] dmaengine: edma: Parameter alignment and long line fixes Peter Ujfalusi <peter.ujfalusi@ti.com> - 2015-09-22 12:10 +0200
[PATCH v3 05/24] ARM/dmaengine: edma: Move of_dma_controller_register to the dmaengine driver Peter Ujfalusi <peter.ujfalusi@ti.com> - 2015-09-22 12:10 +0200
Re: [PATCH v3 10/24] ARM: davinci: Add set dma_mask to eDMA devices Tony Lindgren <tony@atomide.com> - 2015-09-23 19:30 +0200
Re: [PATCH v3 10/24] ARM: davinci: Add set dma_mask to eDMA devices Peter Ujfalusi <peter.ujfalusi@ti.com> - 2015-09-24 12:00 +0200
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