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Groups > linux.kernel > #1231571
| From | Andy Gross <agross@codeaurora.org> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [Patch v2 07/10] arm: dts: Add APQ8084 SMEM nodes |
| Date | 2015-09-23 19:00 +0200 |
| Message-ID | <qbVyH-1BU-39@gated-at.bofh.it> (permalink) |
| References | <qbVyF-1BU-3@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
This patch adds all the required nodes to support SMEM on APQ8084
Signed-off-by: Andy Gross <agross@codeaurora.org>
---
arch/arm/boot/dts/qcom-apq8084.dtsi | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi
index 0554fbd..76be0ba 100644
--- a/arch/arm/boot/dts/qcom-apq8084.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8084.dtsi
@@ -10,6 +10,17 @@
compatible = "qcom,apq8084";
interrupt-parent = <&intc>;
+ reserved-memory {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ smem_mem: smem_region@fa00000 {
+ reg = <0xfa00000 0x200000>;
+ no-map;
+ };
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -224,6 +235,26 @@
reg = <0xfc400000 0x4000>;
};
+ tcsr_mutex_regs: syscon@fd484000 {
+ compatible = "syscon";
+ reg = <0xfd484000 0x2000>;
+ };
+
+ tcsr_mutex: hwlock {
+ compatible = "qcom,tcsr-mutex";
+ syscon = <&tcsr_mutex_regs 0 0x80>;
+ #hwlock-cells = <1>;
+ };
+
+ smem {
+ compatible = "qcom,smem";
+ reg = <0xfc428000 0x4000>;
+ reg-names = "aux-mem1";
+
+ memory-region = <&smem_mem>;
+ hwlocks = <&tcsr_mutex 3>;
+ };
+
tlmm: pinctrl@fd510000 {
compatible = "qcom,apq8084-pinctrl";
reg = <0xfd510000 0x4000>;
--
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[Patch v2 00/10] Add RPM/SMD Support for QCOM platforms Andy Gross <agross@codeaurora.org> - 2015-09-23 19:00 +0200 [Patch v2 07/10] arm: dts: Add APQ8084 SMEM nodes Andy Gross <agross@codeaurora.org> - 2015-09-23 19:00 +0200 [Patch v2 03/10] arm64: dts: qcom: Add MSM8916 SMEM nodes Andy Gross <agross@codeaurora.org> - 2015-09-23 19:00 +0200
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