Re: [PATCH 03/38] drm/i915: fix handling gen8_emit_flush_coherentl3_wa result

From	Jani Nikula <jani.nikula@linux.intel.com>
Newsgroups	linux.kernel
Subject	Re: [PATCH 03/38] drm/i915: fix handling gen8_emit_flush_coherentl3_wa result
Date	2015-09-21 16:10 +0200
Message-ID	<qb9X6-rF-67@gated-at.bofh.it> (permalink)
References	<qb9u2-83M-3@gated-at.bofh.it> <qb9Np-8s4-49@gated-at.bofh.it>
Organization	Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo

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On Mon, 21 Sep 2015, Andrzej Hajda <a.hajda@samsung.com> wrote:
> The function can return negative value.
>
> The problem has been detected using proposed semantic patch
> scripts/coccinelle/tests/unsigned_lesser_than_zero.cocci [1].
>
> [1]: http://permalink.gmane.org/gmane.linux.kernel/2038576
>
> Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>


> ---
>  drivers/gpu/drm/i915/intel_lrc.c | 7 ++++---
>  1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index fe06accb0..ff9a481 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -1254,9 +1254,10 @@ static int gen8_init_indirectctx_bb(struct intel_engine_cs *ring,
>  
>  	/* WaFlushCoherentL3CacheLinesAtContextSwitch:bdw */
>  	if (IS_BROADWELL(ring->dev)) {
> -		index = gen8_emit_flush_coherentl3_wa(ring, batch, index);
> -		if (index < 0)
> -			return index;
> +		int rc = gen8_emit_flush_coherentl3_wa(ring, batch, index);
> +		if (rc < 0)
> +			return rc;
> +		index = rc;
>  	}
>  
>  	/* WaClearSlmSpaceAtContextSwitch:bdw,chv */
> -- 
> 1.9.1
>

-- 
Jani Nikula, Intel Open Source Technology Center
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[PATCH 03/38] drm/i915: fix handling gen8_emit_flush_coherentl3_wa  result Andrzej Hajda <a.hajda@samsung.com> - 2015-09-21 16:00 +0200
  Re: [PATCH 03/38] drm/i915: fix handling gen8_emit_flush_coherentl3_wa result Jani Nikula <jani.nikula@linux.intel.com> - 2015-09-21 16:10 +0200

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