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Groups > linux.kernel > #1227961
| From | Roger Quadros <rogerq@ti.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH v3 23/27] ARM: dts: am437x-gp-evm: Provide NAND ready pin |
| Date | 2015-09-18 17:00 +0200 |
| Message-ID | <qa5iO-5JO-11@gated-at.bofh.it> (permalink) |
| References | <qa5iO-5JO-13@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On these boards NAND ready pin status is avilable over GPMC_WAIT0 pin. For NAND we don't use GPMC wait pin monitoring but get the NAND Ready/Busy# status using GPIOlib. GPMC driver provides the WAIT0 pin status over GPIOlib. Read speed increases from 16516 KiB/ to 18813 KiB/s and write speed was unchanged at 9941 KiB/s. Measured using mtd_speedtest.ko. Signed-off-by: Roger Quadros <rogerq@ti.com> --- arch/arm/boot/dts/am437x-gp-evm.dts | 3 +-- arch/arm/boot/dts/am43x-epos-evm.dts | 3 +-- 2 files changed, 2 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/am437x-gp-evm.dts b/arch/arm/boot/dts/am437x-gp-evm.dts index aa96c99..d7bfe9f 100644 --- a/arch/arm/boot/dts/am437x-gp-evm.dts +++ b/arch/arm/boot/dts/am437x-gp-evm.dts @@ -800,6 +800,7 @@ reg = <0 0 4>; /* device IO registers */ interrupt-parent = <&gic>; interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; + ready-gpio = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */ ti,nand-ecc-opt = "bch16"; ti,elm-id = <&elm>; nand-bus-width = <8>; @@ -818,11 +819,9 @@ gpmc,access-ns = <30>; gpmc,rd-cycle-ns = <40>; gpmc,wr-cycle-ns = <40>; - gpmc,wait-pin = <0>; gpmc,bus-turnaround-ns = <0>; gpmc,cycle2cycle-delay-ns = <0>; gpmc,clk-activation-ns = <0>; - gpmc,wait-monitoring-ns = <0>; gpmc,wr-access-ns = <40>; gpmc,wr-data-mux-bus-ns = <0>; /* MTD partition table */ diff --git a/arch/arm/boot/dts/am43x-epos-evm.dts b/arch/arm/boot/dts/am43x-epos-evm.dts index 9a7786d..4b26762 100644 --- a/arch/arm/boot/dts/am43x-epos-evm.dts +++ b/arch/arm/boot/dts/am43x-epos-evm.dts @@ -567,6 +567,7 @@ reg = <0 0 4>; /* CS0, offset 0, IO size 4 */ interrupt-parent = <&gic>; interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; + ready-gpio = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */ ti,nand-ecc-opt = "bch16"; ti,elm-id = <&elm>; nand-bus-width = <8>; @@ -585,11 +586,9 @@ gpmc,access-ns = <30>; /* tCEA + 4*/ gpmc,rd-cycle-ns = <40>; gpmc,wr-cycle-ns = <40>; - gpmc,wait-pin = <0>; gpmc,bus-turnaround-ns = <0>; gpmc,cycle2cycle-delay-ns = <0>; gpmc,clk-activation-ns = <0>; - gpmc,wait-monitoring-ns = <0>; gpmc,wr-access-ns = <40>; gpmc,wr-data-mux-bus-ns = <0>; /* MTD partition table */ -- 2.1.4 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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[PATCH v3 23/27] ARM: dts: am437x-gp-evm: Provide NAND ready pin Roger Quadros <rogerq@ti.com> - 2015-09-18 17:00 +0200
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