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[PATCH 1/2] usb: musb: Fix DMA for host mode

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From: Cristian Birsan <cristian.birsan@microchip.com>

Commit ac33cdb166811223cc (usb: musb: Remove ifdefs for musb_host_rx in
musb_host.c part5) introduces a problem setting DMA host mode.

This fixes the done condition that advances the musb schedule. Without this
patch the the msub_advance_schedule() is called immediately after receiving an
endpoint rx interrupt without waiting for the dma transfer to complete. As a
consequence when the dma complete interrupt arrives the in_qh member of hw_ep
is already null an the musb_host_rx() exits on !urb error case.

Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com>
Signed-off-by: Joshua Henderson <joshua.henderson@microchip.com>
---
 drivers/usb/musb/musb_host.c |    5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/musb/musb_host.c b/drivers/usb/musb/musb_host.c
index 795a45b..3fdc99b 100644
--- a/drivers/usb/musb/musb_host.c
+++ b/drivers/usb/musb/musb_host.c
@@ -1825,6 +1825,7 @@ void musb_host_rx(struct musb *musb, u8 epnum)
 	u16			rx_csr, val;
 	bool			iso_err = false;
 	bool			done = false;
+	int			ret;
 	u32			status;
 	struct dma_channel	*dma;
 	unsigned int sg_flags = SG_MITER_ATOMIC | SG_MITER_TO_SG;
@@ -2003,10 +2004,10 @@ void musb_host_rx(struct musb *musb, u8 epnum)
 				qh->offset,
 				urb->transfer_buffer_length);
 
-			done = musb_rx_dma_in_inventra_cppi41(c, hw_ep, qh,
+			ret = musb_rx_dma_in_inventra_cppi41(c, hw_ep, qh,
 							      urb, xfer_len,
 							      iso_err);
-			if (done)
+			if (ret)
 				goto finish;
 			else
 				dev_err(musb->controller, "error: rx_dma failed\n");
-- 
1.7.9.5

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[PATCH 1/2] usb: musb: Fix DMA for host mode Joshua Henderson <joshua.henderson@microchip.com> - 2016-02-02 01:40 +0100
  Re: [PATCH 1/2] usb: musb: Fix DMA for host mode Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> - 2016-02-02 14:30 +0100
    Re: [PATCH 1/2] usb: musb: Fix DMA for host mode Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> - 2016-02-04 17:50 +0100

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