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Groups > linux.kernel > #1316624
| From | Thierry Reding <thierry.reding@gmail.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH] ARM: tegra: remove redundant ARM_L1_CACHE_SHIFT_6 select |
| Date | 2016-01-25 13:30 +0100 |
| Message-ID | <qUOro-3Og-37@gated-at.bofh.it> (permalink) |
| References | <qU2d3-b6-7@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
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On Sat, Jan 23, 2016 at 05:55:30PM +0900, Masahiro Yamada wrote:
> These two are both ARMv7 SoCs. They need not explicitly select
> ARM_L1_CACHE_SHIFT_6 because it is enabled along with CPU_V7.
>
> Refer to commit a092f2b15399 ("ARM: 7291/1: cache: assume 64-byte L1
> cachelines for ARMv7 CPUs").
>
> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
> ---
>
> drivers/soc/tegra/Kconfig | 2 --
> 1 file changed, 2 deletions(-)
Applied, thanks.
Thierry
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[PATCH] ARM: tegra: remove redundant ARM_L1_CACHE_SHIFT_6 select Masahiro Yamada <yamada.masahiro@socionext.com> - 2016-01-23 10:00 +0100 Re: [PATCH] ARM: tegra: remove redundant ARM_L1_CACHE_SHIFT_6 select Thierry Reding <thierry.reding@gmail.com> - 2016-01-25 13:30 +0100
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