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Re: [PATCH v3 2/4] KVM: x86: Use vector-hashing to deliver lowest-priority interrupts

From Yang Zhang <yang.zhang.wz@gmail.com>
Newsgroups linux.kernel
Subject Re: [PATCH v3 2/4] KVM: x86: Use vector-hashing to deliver lowest-priority interrupts
Date 2016-01-21 06:30 +0100
Message-ID <qTfYK-Ea-5@gated-at.bofh.it> (permalink)
References <qSQnE-8bo-19@gated-at.bofh.it> <qSQnF-8bo-51@gated-at.bofh.it>
Organization linux.* mail to news gateway

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On 2016/1/20 9:42, Feng Wu wrote:
> Use vector-hashing to deliver lowest-priority interrupts, As an
> example, modern Intel CPUs in server platform use this method to
> handle lowest-priority interrupts.
>
> Signed-off-by: Feng Wu <feng.wu@intel.com>
> ---
> v3:
> - Fix a bug for sparse topologies, in that case, vcpu_id is not equal
> to the return value got by kvm_get_vcpu().
> - Remove unnecessary check in fast irq delivery patch.
> - print a error message only once for each guest when we find hardware
>    disabled LAPIC during interrupt injection.
>
>   arch/x86/include/asm/kvm_host.h |  2 ++
>   arch/x86/kvm/irq_comm.c         | 27 +++++++++++++++++----
>   arch/x86/kvm/lapic.c            | 52 ++++++++++++++++++++++++++++++++++++++---
>   arch/x86/kvm/lapic.h            |  2 ++
>   arch/x86/kvm/x86.c              |  9 +++++++
>   arch/x86/kvm/x86.h              |  1 +
>   6 files changed, 85 insertions(+), 8 deletions(-)
>
> diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
> index 44adbb8..5054810 100644
> --- a/arch/x86/include/asm/kvm_host.h
> +++ b/arch/x86/include/asm/kvm_host.h
> @@ -754,6 +754,8 @@ struct kvm_arch {
>
>   	bool irqchip_split;
>   	u8 nr_reserved_ioapic_pins;
> +
> +	int disabled_lapic_found;
>   };
>
>   struct kvm_vm_stat {
> diff --git a/arch/x86/kvm/irq_comm.c b/arch/x86/kvm/irq_comm.c
> index 8fc89ef..062e907 100644
> --- a/arch/x86/kvm/irq_comm.c
> +++ b/arch/x86/kvm/irq_comm.c
> @@ -34,6 +34,7 @@
>   #include "lapic.h"
>
>   #include "hyperv.h"
> +#include "x86.h"
>
>   static int kvm_set_pic_irq(struct kvm_kernel_irq_routing_entry *e,
>   			   struct kvm *kvm, int irq_source_id, int level,
> @@ -55,8 +56,10 @@ static int kvm_set_ioapic_irq(struct kvm_kernel_irq_routing_entry *e,
>   int kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src,
>   		struct kvm_lapic_irq *irq, unsigned long *dest_map)
>   {
> -	int i, r = -1;
> +	int i, r = -1, idx = 0;
>   	struct kvm_vcpu *vcpu, *lowest = NULL;
> +	unsigned long dest_vcpu_bitmap[BITS_TO_LONGS(KVM_MAX_VCPUS)];
> +	unsigned int dest_vcpus = 0;
>
>   	if (irq->dest_mode == 0 && irq->dest_id == 0xff &&
>   			kvm_lowest_prio_delivery(irq)) {
> @@ -67,6 +70,8 @@ int kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src,
>   	if (kvm_irq_delivery_to_apic_fast(kvm, src, irq, &r, dest_map))
>   		return r;
>
> +	memset(dest_vcpu_bitmap, 0, sizeof(dest_vcpu_bitmap));
> +
>   	kvm_for_each_vcpu(i, vcpu, kvm) {
>   		if (!kvm_apic_present(vcpu))
>   			continue;
> @@ -80,13 +85,25 @@ int kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src,
>   				r = 0;
>   			r += kvm_apic_set_irq(vcpu, irq, dest_map);
>   		} else if (kvm_lapic_enabled(vcpu)) {
> -			if (!lowest)
> -				lowest = vcpu;
> -			else if (kvm_apic_compare_prio(vcpu, lowest) < 0)
> -				lowest = vcpu;
> +			if (!kvm_vector_hashing_enabled()) {
> +				if (!lowest)
> +					lowest = vcpu;
> +				else if (kvm_apic_compare_prio(vcpu, lowest) < 0)
> +					lowest = vcpu;
> +			} else {
> +				__set_bit(i, dest_vcpu_bitmap);
> +				dest_vcpus++;
> +			}
>   		}
>   	}
>
> +	if (dest_vcpus != 0) {
> +		idx = kvm_vector_2_index(irq->vector, dest_vcpus,
> +					 dest_vcpu_bitmap, KVM_MAX_VCPUS);
> +
> +		lowest = kvm_get_vcpu(kvm, idx - 1);
> +	}
> +
>   	if (lowest)
>   		r = kvm_apic_set_irq(lowest, irq, dest_map);
>
> diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
> index 36591fa..e1a449da 100644
> --- a/arch/x86/kvm/lapic.c
> +++ b/arch/x86/kvm/lapic.c
> @@ -675,6 +675,22 @@ bool kvm_apic_match_dest(struct kvm_vcpu *vcpu, struct kvm_lapic *source,
>   	}
>   }
>
> +int kvm_vector_2_index(u32 vector, u32 dest_vcpus,
> +		       const unsigned long *bitmap, u32 bitmap_size)
> +{
> +	u32 mod;
> +	int i, idx = 0;
> +
> +	mod = vector % dest_vcpus;
> +
> +	for (i = 0; i <= mod; i++) {
> +		idx = find_next_bit(bitmap, bitmap_size, idx) + 1;
> +		BUG_ON(idx > bitmap_size);
> +	}
> +
> +	return idx;
> +}
> +
>   bool kvm_irq_delivery_to_apic_fast(struct kvm *kvm, struct kvm_lapic *src,
>   		struct kvm_lapic_irq *irq, int *r, unsigned long *dest_map)
>   {
> @@ -727,21 +743,51 @@ bool kvm_irq_delivery_to_apic_fast(struct kvm *kvm, struct kvm_lapic *src,
>
>   		dst = map->logical_map[cid];
>
> -		if (kvm_lowest_prio_delivery(irq)) {
> +		if (!kvm_lowest_prio_delivery(irq))
> +			goto set_irq;
> +
> +		if (!kvm_vector_hashing_enabled()) {
>   			int l = -1;
>   			for_each_set_bit(i, &bitmap, 16) {
>   				if (!dst[i])
>   					continue;
>   				if (l < 0)
>   					l = i;
> -				else if (kvm_apic_compare_prio(dst[i]->vcpu, dst[l]->vcpu) < 0)
> +				else if (kvm_apic_compare_prio(dst[i]->vcpu,
> +							dst[l]->vcpu) < 0)
>   					l = i;
>   			}
> -
>   			bitmap = (l >= 0) ? 1 << l : 0;
> +		} else {
> +			int idx = 0;
> +			unsigned int dest_vcpus = 0;
> +
> +			dest_vcpus = hweight16(bitmap);
> +			if (dest_vcpus == 0)
> +				goto out;
> +
> +			idx = kvm_vector_2_index(irq->vector,
> +				dest_vcpus, &bitmap, 16);
> +
> +			/*
> +			 * We may find a hardware disabled LAPIC here, if that
> +			 * is the case, print out a error message once for each
> +			 * guest and return.
> +			 */
> +			if (!dst[idx-1] &&
> +				(kvm->arch.disabled_lapic_found == 0)) {
> +				kvm->arch.disabled_lapic_found = 1;
> +				printk(KERN_ERR
> +					"Disabled LAPIC found during irq injection\n");
> +				goto out;

What does "goto out" mean? Inject successfully or fail? According the 
value of ret which is set to ture here, it means inject successfully but 
i = -1.

> +			}
> +
> +			bitmap = 0;
> +			__set_bit(idx-1, &bitmap);

We can reuse the code like:
bitmap = (idx > 0) ? 1 << (idx - 1) : 0;

>   		}
>   	}
>
> +set_irq:
>   	for_each_set_bit(i, &bitmap, 16) {
>   		if (!dst[i])
>   			continue;
> diff --git a/arch/x86/kvm/lapic.h b/arch/x86/kvm/lapic.h
> index 41bdb35..d864601 100644
> --- a/arch/x86/kvm/lapic.h
> +++ b/arch/x86/kvm/lapic.h
> @@ -175,4 +175,6 @@ void wait_lapic_expire(struct kvm_vcpu *vcpu);
>
>   bool kvm_intr_is_single_vcpu_fast(struct kvm *kvm, struct kvm_lapic_irq *irq,
>   			struct kvm_vcpu **dest_vcpu);
> +int kvm_vector_2_index(u32 vector, u32 dest_vcpus,
> +		       const unsigned long *bitmap, u32 bitmap_size);
>   #endif
> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> index 4244c2b..47daf77 100644
> --- a/arch/x86/kvm/x86.c
> +++ b/arch/x86/kvm/x86.c
> @@ -123,6 +123,9 @@ module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
>   unsigned int __read_mostly lapic_timer_advance_ns = 0;
>   module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
>
> +bool __read_mostly enable_vector_hashing = 1;
> +module_param(enable_vector_hashing, bool, S_IRUGO);
> +
>   static bool __read_mostly backwards_tsc_observed = false;
>
>   #define KVM_NR_SHARED_MSRS 16
> @@ -8370,6 +8373,12 @@ int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
>   	return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
>   }
>
> +bool kvm_vector_hashing_enabled(void)
> +{
> +	return enable_vector_hashing;
> +}
> +EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
> +
>   EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
>   EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
>   EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
> diff --git a/arch/x86/kvm/x86.h b/arch/x86/kvm/x86.h
> index f2afa5f..04bd0f9 100644
> --- a/arch/x86/kvm/x86.h
> +++ b/arch/x86/kvm/x86.h
> @@ -179,6 +179,7 @@ int kvm_mtrr_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data);
>   int kvm_mtrr_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
>   bool kvm_mtrr_check_gfn_range_consistency(struct kvm_vcpu *vcpu, gfn_t gfn,
>   					  int page_num);
> +bool kvm_vector_hashing_enabled(void);
>
>   #define KVM_SUPPORTED_XCR0     (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
>   				| XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
>


-- 
best regards
yang

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Thread

[PATCH v3 0/4] VT-d posted-interrupts follow ups Feng Wu <feng.wu@intel.com> - 2016-01-20 03:10 +0100
  [PATCH v3 4/4] KVM/VMX: Add host irq information in trace event when updating IRTE for posted interrupts Feng Wu <feng.wu@intel.com> - 2016-01-20 03:10 +0100
    Re: [PATCH v3 4/4] KVM/VMX: Add host irq information in trace event  when updating IRTE for posted interrupts Radim Krčmář <rkrcmar@redhat.com> - 2016-01-21 21:20 +0100
  [PATCH v3 2/4] KVM: x86: Use vector-hashing to deliver lowest-priority interrupts Feng Wu <feng.wu@intel.com> - 2016-01-20 03:10 +0100
    Re: [PATCH v3 2/4] KVM: x86: Use vector-hashing to deliver  lowest-priority interrupts Yang Zhang <yang.zhang.wz@gmail.com> - 2016-01-21 06:30 +0100
      RE: [PATCH v3 2/4] KVM: x86: Use vector-hashing to deliver  lowest-priority interrupts "Wu, Feng" <feng.wu@intel.com> - 2016-01-21 06:40 +0100
        RE: [PATCH v3 2/4] KVM: x86: Use vector-hashing to deliver  lowest-priority interrupts "Wu, Feng" <feng.wu@intel.com> - 2016-01-21 06:50 +0100
          Re: [PATCH v3 2/4] KVM: x86: Use vector-hashing to deliver  lowest-priority interrupts Yang Zhang <yang.zhang.wz@gmail.com> - 2016-01-21 07:00 +0100
            Re: [PATCH v3 2/4] KVM: x86: Use vector-hashing to deliver  lowest-priority interrupts Yang Zhang <yang.zhang.wz@gmail.com> - 2016-01-21 07:10 +0100
            RE: [PATCH v3 2/4] KVM: x86: Use vector-hashing to deliver  lowest-priority interrupts "Wu, Feng" <feng.wu@intel.com> - 2016-01-21 07:10 +0100
        Re: [PATCH v3 2/4] KVM: x86: Use vector-hashing to deliver  lowest-priority interrupts Yang Zhang <yang.zhang.wz@gmail.com> - 2016-01-21 06:50 +0100
        Re: [PATCH v3 2/4] KVM: x86: Use vector-hashing to deliver  lowest-priority interrupts "rkrcmar@redhat.com" <rkrcmar@redhat.com> - 2016-01-21 18:30 +0100
          RE: [PATCH v3 2/4] KVM: x86: Use vector-hashing to deliver  lowest-priority interrupts "Wu, Feng" <feng.wu@intel.com> - 2016-01-22 03:10 +0100
          Re: [PATCH v3 2/4] KVM: x86: Use vector-hashing to deliver  lowest-priority interrupts Yang Zhang <yang.zhang.wz@gmail.com> - 2016-01-22 05:10 +0100
            Re: [PATCH v3 2/4] KVM: x86: Use vector-hashing to deliver  lowest-priority interrupts "rkrcmar@redhat.com" <rkrcmar@redhat.com> - 2016-01-22 14:50 +0100
    Re: [PATCH v3 2/4] KVM: x86: Use vector-hashing to deliver  lowest-priority interrupts Radim Krčmář <rkrcmar@redhat.com> - 2016-01-21 21:00 +0100
      RE: [PATCH v3 2/4] KVM: x86: Use vector-hashing to deliver  lowest-priority interrupts "Wu, Feng" <feng.wu@intel.com> - 2016-01-22 06:20 +0100
        Re: [PATCH v3 2/4] KVM: x86: Use vector-hashing to deliver  lowest-priority interrupts Radim Krcmár <rkrcmar@redhat.com> - 2016-01-22 15:10 +0100
          Re: [PATCH v3 2/4] KVM: x86: Use vector-hashing to deliver  lowest-priority interrupts Paolo Bonzini <pbonzini@redhat.com> - 2016-01-25 13:30 +0100
            Re: [PATCH v3 2/4] KVM: x86: Use vector-hashing to deliver  lowest-priority interrupts Radim Krcmár <rkrcmar@redhat.com> - 2016-01-25 16:30 +0100
              Re: [PATCH v3 2/4] KVM: x86: Use vector-hashing to deliver  lowest-priority interrupts Paolo Bonzini <pbonzini@redhat.com> - 2016-01-25 17:20 +0100
                RE: [PATCH v3 2/4] KVM: x86: Use vector-hashing to deliver  lowest-priority interrupts "Wu, Feng" <feng.wu@intel.com> - 2016-01-26 02:20 +0100

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