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[PATCH] clk: rockchip: rk3036: Add apll as the critical clock

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The apll may be closed if there are some child clock nodes below
it when the device startup. Therefore, the apll should be keep
critical.

The apll tree like this:
    pll_apll
       apll
          armclk
             pclk_dbg
             aclk_core_pre
          aclk_hvec
          uart_pll_clk
             uart2_src
                uart2_frac
             uart1_src
                uart1_frac
             uart0_src
                uart0_frac

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---

 drivers/clk/rockchip/clk-rk3036.c |    1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/clk/rockchip/clk-rk3036.c b/drivers/clk/rockchip/clk-rk3036.c
index ebce980..483913b 100644
--- a/drivers/clk/rockchip/clk-rk3036.c
+++ b/drivers/clk/rockchip/clk-rk3036.c
@@ -425,6 +425,7 @@ static struct rockchip_clk_branch rk3036_clk_branches[] __initdata = {
 };
 
 static const char *const rk3036_critical_clocks[] __initconst = {
+	"apll",
 	"aclk_cpu",
 	"aclk_peri",
 	"hclk_peri",
-- 
1.7.9.5

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[PATCH] clk: rockchip: rk3036: Add apll as the critical clock Xing Zheng <zhengxing@rock-chips.com> - 2016-01-20 09:40 +0100
  Re: [PATCH] clk: rockchip: rk3036: Add apll as the critical clock Heiko Stuebner <heiko@sntech.de> - 2016-01-21 10:30 +0100
    Re: [PATCH] clk: rockchip: rk3036: Add apll as the critical clock Xing Zheng <zhengxing@rock-chips.com> - 2016-01-22 08:50 +0100

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