Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]
Groups > linux.kernel > #1309724
| From | Borislav Petkov <bp@alien8.de> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH 3/5] x86/mcheck/AMD: Reduce number of blocks scanned per bank |
| Date | 2016-01-14 23:40 +0100 |
| Message-ID | <qQYIG-5f6-5@gated-at.bofh.it> (permalink) |
| References | <qQY61-4Io-53@gated-at.bofh.it> <qQYIG-5f6-7@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On Thu, Jan 14, 2016 at 04:05:38PM -0600, Aravind Gopalakrishnan wrote:
> From Fam17h onwards, the number of extended MISC register
> blocks is reduced to 4. It is an architectural change
> from what we had on earlier processors.
>
> Changing the value of NRBLOCKS here to reflect that change.
>
> Although theoritically the total number of extended MCx_MISC
> registers was 8 in earlier processor families, in practice
> we only had to use the extra registers for MC4. And only 2 of
> those were used. So this change does not affect older processors.
> Tested it on Fam10h, Fam15h systems and works fine.
>
> Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
> ---
> arch/x86/kernel/cpu/mcheck/mce_amd.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c
> index da570a8..e650fdc 100644
> --- a/arch/x86/kernel/cpu/mcheck/mce_amd.c
> +++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c
> @@ -28,7 +28,7 @@
> #include <asm/msr.h>
> #include <asm/trace/irq_vectors.h>
>
> -#define NR_BLOCKS 9
> +#define NR_BLOCKS 5
This doesn't look necessary to me. We do check MCi_MISC[BlkPtr] before
accessing that MSR.
--
Regards/Gruss,
Boris.
ECO tip #101: Trim your mails when you reply.
Back to linux.kernel | Previous | Next — Previous in thread | Next in thread | Find similar | Unroll thread
[PATCH 0/5] Updates to AMD MCE driver per Scalable MCA spec Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com> - 2016-01-14 23:40 +0100
Re: [PATCH 3/5] x86/mcheck/AMD: Reduce number of blocks scanned per bank Borislav Petkov <bp@alien8.de> - 2016-01-14 23:40 +0100
Re: [PATCH 3/5] x86/mcheck/AMD: Reduce number of blocks scanned per bank Borislav Petkov <bp@alien8.de> - 2016-01-15 00:00 +0100
Re: [PATCH 3/5] x86/mcheck/AMD: Reduce number of blocks scanned per bank Borislav Petkov <bp@alien8.de> - 2016-01-15 12:20 +0100
[PATCH 1/5] x86, mce: Fix order of AMD MCE init function call Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com> - 2016-01-14 23:40 +0100
[PATCH 3/5] x86/mcheck/AMD: Reduce number of blocks scanned per bank Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com> - 2016-01-14 23:40 +0100
[PATCH 2/5] x86/mcheck/AMD: Do not perform shared bank check for future processors Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com> - 2016-01-14 23:40 +0100
csiph-web