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Groups > linux.kernel > #1307099
| From | James Liao <jamesjj.liao@mediatek.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH v3 6/6] reset: mediatek: Add MT2701 reset driver |
| Date | 2016-01-12 09:40 +0100 |
| Message-ID | <qQ2EG-6Ka-19@gated-at.bofh.it> (permalink) |
| References | <qQ2EG-6Ka-9@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
From: Shunli Wang <shunli.wang@mediatek.com>
In infrasys and perifsys, there are many reset
control bits for kinds of modules. These bits are
used as actual reset controllers to be registered
into kernel's generic reset controller framework.
Signed-off-by: Shunli Wang <shunli.wang@mediatek.com>
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
---
drivers/clk/mediatek/clk-mt2701.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/clk/mediatek/clk-mt2701.c b/drivers/clk/mediatek/clk-mt2701.c
index 1061715..4b64644 100644
--- a/drivers/clk/mediatek/clk-mt2701.c
+++ b/drivers/clk/mediatek/clk-mt2701.c
@@ -665,6 +665,8 @@ static void __init mtk_infrasys_init(struct device_node *node)
if (r)
pr_err("%s(): could not register clock provider: %d\n",
__func__, r);
+
+ mtk_register_reset_controller(node, 2, 0x30);
}
CLK_OF_DECLARE(mtk_infrasys, "mediatek,mt2701-infracfg", mtk_infrasys_init);
@@ -782,6 +784,8 @@ static void __init mtk_pericfg_init(struct device_node *node)
if (r)
pr_err("%s(): could not register clock provider: %d\n",
__func__, r);
+
+ mtk_register_reset_controller(node, 2, 0x0);
}
CLK_OF_DECLARE(mtk_pericfg, "mediatek,mt2701-pericfg", mtk_pericfg_init);
@@ -996,6 +1000,8 @@ static void __init mtk_hifsys_init(struct device_node *node)
if (r)
pr_err("%s(): could not register clock provider: %d\n",
__func__, r);
+
+ mtk_register_reset_controller(node, 1, 0x34);
}
CLK_OF_DECLARE(mtk_hifsys, "mediatek,mt2701-hifsys", mtk_hifsys_init);
--
1.9.1
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[PATCH v3 0/6] Add clock support for Mediatek MT2701 James Liao <jamesjj.liao@mediatek.com> - 2016-01-12 09:40 +0100
[PATCH v3 6/6] reset: mediatek: Add MT2701 reset driver James Liao <jamesjj.liao@mediatek.com> - 2016-01-12 09:40 +0100
Re: [PATCH v3 6/6] reset: mediatek: Add MT2701 reset driver Philipp Zabel <p.zabel@pengutronix.de> - 2016-01-12 11:30 +0100
[PATCH v3 3/6] clk: mediatek: Add dt-bindings for MT2701 clocks James Liao <jamesjj.liao@mediatek.com> - 2016-01-12 09:40 +0100
Re: [PATCH v3 3/6] clk: mediatek: Add dt-bindings for MT2701 clocks Michael Turquette <mturquette@baylibre.com> - 2016-01-13 20:40 +0100
[PATCH v3 2/6] dt-bindings: ARM: Mediatek: Document bindings for MT2701 James Liao <jamesjj.liao@mediatek.com> - 2016-01-12 09:40 +0100
Re: [PATCH v3 2/6] dt-bindings: ARM: Mediatek: Document bindings for MT2701 Rob Herring <robh@kernel.org> - 2016-01-13 03:20 +0100
[PATCH v3 1/6] clk: mediatek: Refine the makefile to support multiple clock drivers James Liao <jamesjj.liao@mediatek.com> - 2016-01-12 09:40 +0100
[PATCH v3 5/6] reset: mediatek: Add MT2701 reset controller dt-binding file James Liao <jamesjj.liao@mediatek.com> - 2016-01-12 09:40 +0100
Re: [PATCH v3 5/6] reset: mediatek: Add MT2701 reset controller dt-binding file Philipp Zabel <p.zabel@pengutronix.de> - 2016-01-12 11:30 +0100
Re: [PATCH v3 0/6] Add clock support for Mediatek MT2701 John Crispin <blogic@openwrt.org> - 2016-01-12 11:20 +0100
Re: [PATCH v3 0/6] Add clock support for Mediatek MT2701 James Liao <jamesjj.liao@mediatek.com> - 2016-01-13 04:10 +0100
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