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Groups > linux.kernel > #1303528

[PATCH v2 3/5] clk: rockchip: rk3036: fix the div offset for emac clock

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Due to reference to old version TRM, there are incorrect emac clock node.
The SEL_21_9 is used for the parent div, the SEL_21_4 is used for the
child div.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---

 drivers/clk/rockchip/clk-rk3036.c |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/rockchip/clk-rk3036.c b/drivers/clk/rockchip/clk-rk3036.c
index 04b5249..1f00fab 100644
--- a/drivers/clk/rockchip/clk-rk3036.c
+++ b/drivers/clk/rockchip/clk-rk3036.c
@@ -344,12 +344,12 @@ static struct rockchip_clk_branch rk3036_clk_branches[] __initdata = {
 			RK2928_CLKGATE_CON(10), 5, GFLAGS),
 
 	COMPOSITE_NOGATE(0, "mac_pll_src", mux_pll_src_3plls_p, 0,
-			RK2928_CLKSEL_CON(21), 0, 2, MFLAGS, 4, 5, DFLAGS),
+			RK2928_CLKSEL_CON(21), 0, 2, MFLAGS, 9, 5, DFLAGS),
 	MUX(SCLK_MACREF, "mac_clk_ref", mux_mac_p, CLK_SET_RATE_PARENT,
 			RK2928_CLKSEL_CON(21), 3, 1, MFLAGS),
 
 	COMPOSITE_NOMUX(SCLK_MAC, "mac_clk", "mac_clk_ref", 0,
-			RK2928_CLKSEL_CON(21), 9, 5, DFLAGS,
+			RK2928_CLKSEL_CON(21), 4, 5, DFLAGS,
 			RK2928_CLKGATE_CON(2), 6, GFLAGS),
 
 	MUX(SCLK_HDMI, "dclk_hdmi", mux_dclk_p, 0,
-- 
1.7.9.5


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Thread

[PATCH v2 0/5] fix some clock configuration for the RK3036 platform Xing Zheng <zhengxing@rock-chips.com> - 2016-01-07 13:20 +0100
  [PATCH v2 3/5] clk: rockchip: rk3036: fix the div offset for emac clock Xing Zheng <zhengxing@rock-chips.com> - 2016-01-07 13:20 +0100
  [PATCH v2 2/5] clk: rockchip: rk3036: fix uarts clock error Xing Zheng <zhengxing@rock-chips.com> - 2016-01-07 13:20 +0100
  [PATCH v2 1/5] clk: rockchip: rk3036: fix the FLAGs for clock mux Xing Zheng <zhengxing@rock-chips.com> - 2016-01-07 13:20 +0100
  [PATCH v2 4/5] clk: rockchip: rk3036: rename emac ext source clock Xing Zheng <zhengxing@rock-chips.com> - 2016-01-07 13:20 +0100
  [PATCH v2 5/5] clk: rockchip: rk3036: add HCLK_MAC id for emac Xing Zheng <zhengxing@rock-chips.com> - 2016-01-07 13:30 +0100
  Re: [PATCH v2 0/5] fix some clock configuration for the RK3036 platform Heiko Stuebner <heiko@sntech.de> - 2016-01-09 21:40 +0100
    Re: [PATCH v2 0/5] fix some clock configuration for the RK3036 platform Xing Zheng <zhengxing@rock-chips.com> - 2016-01-10 08:30 +0100

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