Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]

Groups > linux.kernel > #1299598

Re: [PATCH 1/5] clk: mediatek: Refine the makefile to support multiple clock drivers

Show all headers | View raw

On 30/12/15 07:27, James Liao wrote:
> Add a Kconfig to define clock configuration for each SoC, and
> modify the Makefile to build drivers that only selected in config.
>
> Signed-off-by: Shunli Wang <shunli.wang@mediatek.com>
> Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
> ---

Looks good to me.

Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>

>   drivers/clk/Kconfig           |  1 +
>   drivers/clk/mediatek/Kconfig  | 23 +++++++++++++++++++++++
>   drivers/clk/mediatek/Makefile |  6 +++---
>   3 files changed, 27 insertions(+), 3 deletions(-)
>   create mode 100644 drivers/clk/mediatek/Kconfig
>
> diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
> index c3e3a02..b7a37dc 100644
> --- a/drivers/clk/Kconfig
> +++ b/drivers/clk/Kconfig
> @@ -198,3 +198,4 @@ source "drivers/clk/mvebu/Kconfig"
>
>   source "drivers/clk/samsung/Kconfig"
>   source "drivers/clk/tegra/Kconfig"
> +source "drivers/clk/mediatek/Kconfig"
> diff --git a/drivers/clk/mediatek/Kconfig b/drivers/clk/mediatek/Kconfig
> new file mode 100644
> index 0000000..dc224e6
> --- /dev/null
> +++ b/drivers/clk/mediatek/Kconfig
> @@ -0,0 +1,23 @@
> +#
> +# MediaTek SoC drivers
> +#
> +config COMMON_CLK_MEDIATEK
> +	bool
> +	---help---
> +	  Mediatek SoCs' clock support.
> +
> +config COMMON_CLK_MT8135
> +	bool "Clock driver for Mediatek MT8135"
> +	depends on COMMON_CLK
> +	select COMMON_CLK_MEDIATEK
> +	default ARCH_MEDIATEK
> +	---help---
> +	  This driver supports Mediatek MT8135 clocks.
> +
> +config COMMON_CLK_MT8173
> +	bool "Clock driver for Mediatek MT8173"
> +	depends on COMMON_CLK
> +	select COMMON_CLK_MEDIATEK
> +	default ARCH_MEDIATEK
> +	---help---
> +	  This driver supports Mediatek MT8173 clocks.
> diff --git a/drivers/clk/mediatek/Makefile b/drivers/clk/mediatek/Makefile
> index 95fdfac..32e7222 100644
> --- a/drivers/clk/mediatek/Makefile
> +++ b/drivers/clk/mediatek/Makefile
> @@ -1,4 +1,4 @@
> -obj-y += clk-mtk.o clk-pll.o clk-gate.o clk-apmixed.o
> +obj-$(CONFIG_COMMON_CLK_MEDIATEK) += clk-mtk.o clk-pll.o clk-gate.o clk-apmixed.o
>   obj-$(CONFIG_RESET_CONTROLLER) += reset.o
> -obj-y += clk-mt8135.o
> -obj-y += clk-mt8173.o
> +obj-$(CONFIG_COMMON_CLK_MT8135) += clk-mt8135.o
> +obj-$(CONFIG_COMMON_CLK_MT8173) += clk-mt8173.o
>
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Back to linux.kernel | Previous | Next — Previous in thread | Next in thread | Find similar | Unroll thread

Thread

[PATCH 0/5] Add clock support for Mediatek MT2701  James Liao <jamesjj.liao@mediatek.com> - 2015-12-30 07:30 +0100
  [PATCH 1/5] clk: mediatek: Refine the makefile to support multiple clock drivers James Liao <jamesjj.liao@mediatek.com> - 2015-12-30 07:30 +0100
    Re: [PATCH 1/5] clk: mediatek: Refine the makefile to support multiple clock  drivers Michael Turquette <mturquette@baylibre.com> - 2015-12-31 00:30 +0100
    Re: [PATCH 1/5] clk: mediatek: Refine the makefile to support  multiple clock drivers Matthias Brugger <matthias.bgg@gmail.com> - 2015-12-31 09:20 +0100
  [PATCH 2/5] clk: mediatek: Add dt-bindings for MT2701 clocks James Liao <jamesjj.liao@mediatek.com> - 2015-12-30 07:30 +0100
    Re: [PATCH 2/5] clk: mediatek: Add dt-bindings for MT2701 clocks Michael Turquette <mturquette@baylibre.com> - 2015-12-31 00:40 +0100
  [PATCH 4/5] reset: mediatek: mt2701 reset controller dt-binding file James Liao <jamesjj.liao@mediatek.com> - 2015-12-30 07:40 +0100
  Re: [PATCH 3/5] clk: mediatek: Add MT2701 clock support Michael Turquette <mturquette@baylibre.com> - 2015-12-31 00:40 +0100
    Re: [PATCH 3/5] clk: mediatek: Add MT2701 clock support James Liao <jamesjj.liao@mediatek.com> - 2015-12-31 11:10 +0100

csiph-web