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[PATCH v12 16/18] drm: bridge: analogix/dp: expand the wait time for looking AUX CH reply flag

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On Rockchip platform, sometimes driver would failed at reading EDID
message, and it's caused by the AUX reply flag wouldn't received under
the 100*10us wait time.

But after expand the wait time a little, the AUX reply flag would be
set, so maybe the wait time is a little critical. Besides the analogix
dp book haven't reminded the standard wait for looking AUX reply flag,
so I thought it's okay to expand the wait time.

And the external wait time won't hurt Exynos DP too much, cause they
wouldn't meet this problem, then driver would received the reply command
very soon, so no more additional wait time would bring to Exynos platform.

Signed-off-by: Yakir Yang <ykk@rock-chips.com>
---
Changes in v12:
- Using another way to expand the AUX reply wait time (Jingoo)

Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 10 ++++------
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
index cba3ffd..8687eea 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
@@ -471,7 +471,7 @@ int analogix_dp_start_aux_transaction(struct analogix_dp_device *dp)
 {
 	int reg;
 	int retval = 0;
-	int timeout_loop = 0;
+	unsigned long timeout;
 
 	/* Enable AUX CH operation */
 	reg = readl(dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_2);
@@ -479,14 +479,12 @@ int analogix_dp_start_aux_transaction(struct analogix_dp_device *dp)
 	writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_2);
 
 	/* Is AUX CH command reply received? */
-	reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA);
-	while (!(reg & RPLY_RECEIV)) {
-		timeout_loop++;
-		if (DP_TIMEOUT_LOOP_COUNT < timeout_loop) {
+	timeout = jiffies + msecs_to_jiffies(5);
+	while ((readl(dp->reg_base + ANALOGIX_DP_INT_STA) & RPLY_RECEIV) == 0) {
+		if (time_after(jiffies, timeout)) {
 			dev_err(dp->dev, "AUX CH command reply failed!\n");
 			return -ETIMEDOUT;
 		}
-		reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA);
 		usleep_range(10, 11);
 	}
 
-- 
1.9.1


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Thread

[PATCH v12 0/18] Add Analogix Core Display Port Driver Yakir Yang <ykk@rock-chips.com> - 2015-12-23 13:30 +0100
  [PATCH v12 05/18] dt-bindings: add document for analogix display port driver Yakir Yang <ykk@rock-chips.com> - 2015-12-23 13:40 +0100
  [PATCH v12 06/18] ARM: dts: exynos/dp: remove some properties that deprecated by analogix_dp driver Yakir Yang <ykk@rock-chips.com> - 2015-12-23 13:40 +0100
  [PATCH v12 07/18] drm: rockchip: dp: add rockchip platform dp driver Yakir Yang <ykk@rock-chips.com> - 2015-12-23 13:40 +0100
  [PATCH v12 08/18] dt-bindings: add document for rockchip variant of analogix_dp Yakir Yang <ykk@rock-chips.com> - 2015-12-23 13:40 +0100
  [PATCH v12 03/18] drm: bridge: analogix/dp: remove duplicate configuration of link rate and link count Yakir Yang <ykk@rock-chips.com> - 2015-12-23 13:40 +0100
  [PATCH v12 09/18] phy: Add driver for rockchip Display Port PHY Yakir Yang <ykk@rock-chips.com> - 2015-12-23 13:40 +0100
  [PATCH v12 04/18] drm: bridge: analogix/dp: dynamic parse sync_pol & interlace & dynamic_range Yakir Yang <ykk@rock-chips.com> - 2015-12-23 13:40 +0100
  [PATCH v12 02/18] drm: bridge: analogix/dp: fix some obvious code style Yakir Yang <ykk@rock-chips.com> - 2015-12-23 13:40 +0100
  [PATCH v12 12/18] drm: bridge: analogix/dp: add max link rate and lane count limit for RK3288 Yakir Yang <ykk@rock-chips.com> - 2015-12-23 13:50 +0100
  [PATCH v12 13/18] drm: bridge: analogix/dp: try force hpd after plug in lookup failed Yakir Yang <ykk@rock-chips.com> - 2015-12-23 13:50 +0100
  [PATCH v12 10/18] dt-bindings: add document for rockchip dp phy Yakir Yang <ykk@rock-chips.com> - 2015-12-23 13:50 +0100
  [PATCH v12 11/18] drm: bridge: analogix/dp: add some rk3288 special registers setting Yakir Yang <ykk@rock-chips.com> - 2015-12-23 13:50 +0100
  [PATCH v12 14/18] drm: bridge: analogix/dp: move hpd detect to connector detect function Yakir Yang <ykk@rock-chips.com> - 2015-12-23 13:50 +0100
  [PATCH v12 16/18] drm: bridge: analogix/dp: expand the wait time for looking AUX CH reply flag Yakir Yang <ykk@rock-chips.com> - 2015-12-23 14:00 +0100
    Re: [PATCH v12 16/18] drm: bridge: analogix/dp: expand the wait time for looking AUX CH reply flag "Jingoo Han" <jingoohan1@gmail.com> - 2015-12-23 16:20 +0100
      Re: [PATCH v12 16/18] drm: bridge: analogix/dp: expand the wait time  for looking AUX CH reply flag Yakir Yang <ykk@rock-chips.com> - 2015-12-24 02:30 +0100
        Re: [PATCH v12 16/18] drm: bridge: analogix/dp: expand the wait time for looking AUX CH reply flag "Jingoo Han" <jingoohan1@gmail.com> - 2015-12-25 14:10 +0100
  [PATCH v12 15/18] drm: bridge: analogix/dp: add edid modes parse in get_modes method Yakir Yang <ykk@rock-chips.com> - 2015-12-23 14:00 +0100
  [PATCH v12 18/18] drm: bridge: analogix/dp: Fix the possible dead lock in bridge disable time Yakir Yang <ykk@rock-chips.com> - 2015-12-23 14:00 +0100
  [PATCH v12 17/18] drm: bridge: analogix/dp: add panel prepare/unprepare in suspend/resume time Yakir Yang <ykk@rock-chips.com> - 2015-12-23 14:00 +0100

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