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Groups > linux.kernel > #1293409
| From | Eric Anholt <eric@anholt.net> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH v2 2/8] irq: bcm2836: Add SMP support for the 2836 |
| Date | 2015-12-17 01:00 +0100 |
| Message-ID | <qGu9c-8tX-13@gated-at.bofh.it> (permalink) |
| References | <qGu9c-8tX-3@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
From: Andrea Merello <andrea.merello@gmail.com>
The firmware sets the secondaries spinning waiting for a non-NULL
value to show up in the last IPI mailbox.
The original SMP port from the downstream tree was done by Andrea, and
Eric cleaned it up/rewrote it a few times from there.
Signed-off-by: Andrea Merello <andrea.merello@gmail.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
---
drivers/irqchip/irq-bcm2836.c | 27 +++++++++++++++++++++++++--
1 file changed, 25 insertions(+), 2 deletions(-)
diff --git a/drivers/irqchip/irq-bcm2836.c b/drivers/irqchip/irq-bcm2836.c
index 6ec125e..c5ef4df 100644
--- a/drivers/irqchip/irq-bcm2836.c
+++ b/drivers/irqchip/irq-bcm2836.c
@@ -53,14 +53,16 @@
/* Same status bits as above, but for FIQ. */
#define LOCAL_FIQ_PENDING0 0x070
/*
- * Mailbox0 write-to-set bits. There are 16 mailboxes, 4 per CPU, and
+ * Mailbox write-to-set bits. There are 16 mailboxes, 4 per CPU, and
* these bits are organized by mailbox number and then CPU number. We
* use mailbox 0 for IPIs. The mailbox's interrupt is raised while
* any bit is set.
*/
#define LOCAL_MAILBOX0_SET0 0x080
-/* Mailbox0 write-to-clear bits. */
+#define LOCAL_MAILBOX3_SET0 0x08c
+/* Mailbox write-to-clear bits. */
#define LOCAL_MAILBOX0_CLR0 0x0c0
+#define LOCAL_MAILBOX3_CLR0 0x0cc
#define LOCAL_IRQ_CNTPSIRQ 0
#define LOCAL_IRQ_CNTPNSIRQ 1
@@ -226,6 +228,26 @@ static const struct irq_domain_ops bcm2836_arm_irqchip_intc_ops = {
.xlate = irq_domain_xlate_onecell
};
+#ifdef CONFIG_SMP
+int __init bcm2836_smp_boot_secondary(unsigned int cpu,
+ struct task_struct *idle)
+{
+ unsigned long secondary_startup_phys =
+ (unsigned long)virt_to_phys((void *)secondary_startup);
+
+ dsb();
+ writel(secondary_startup_phys,
+ intc.base + LOCAL_MAILBOX3_SET0 + 16 * cpu);
+
+ return 0;
+}
+
+static const struct smp_operations bcm2836_smp_ops __initconst = {
+ .smp_boot_secondary = bcm2836_smp_boot_secondary,
+};
+
+#endif
+
static void
bcm2836_arm_irqchip_smp_init(void)
{
@@ -237,6 +259,7 @@ bcm2836_arm_irqchip_smp_init(void)
register_cpu_notifier(&bcm2836_arm_irqchip_cpu_notifier);
set_smp_cross_call(bcm2836_arm_irqchip_send_ipi);
+ smp_set_ops(&bcm2836_smp_ops);
#endif
}
--
2.6.2
--
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[PATCH v2 0/8] Raspberry Pi 2 support. Eric Anholt <eric@anholt.net> - 2015-12-17 01:00 +0100
[PATCH v2 8/8] ARM: bcm2835: Add Kconfig support for bcm2836 Eric Anholt <eric@anholt.net> - 2015-12-17 01:00 +0100
Re: [PATCH v2 8/8] ARM: bcm2835: Add Kconfig support for bcm2836 Eric Anholt <eric@anholt.net> - 2015-12-26 23:40 +0100
[PATCH v2 5/8] ARM: bcm2835: Move the CPU/peripheral include out of common RPi DT. Eric Anholt <eric@anholt.net> - 2015-12-17 01:00 +0100
[PATCH v2 1/8] irq: bcm2836: Fix initialization of the LOCAL_IRQ_CNT*IRQ timers Eric Anholt <eric@anholt.net> - 2015-12-17 01:00 +0100
[PATCH v2 3/8] dt-bindings: Add root properties for Raspberry Pi 2 Eric Anholt <eric@anholt.net> - 2015-12-17 01:00 +0100
Re: [PATCH v2 3/8] dt-bindings: Add root properties for Raspberry Pi 2 Rob Herring <robh@kernel.org> - 2015-12-19 05:20 +0100
[PATCH v2 2/8] irq: bcm2836: Add SMP support for the 2836 Eric Anholt <eric@anholt.net> - 2015-12-17 01:00 +0100
Re: [PATCH v2 2/8] irq: bcm2836: Add SMP support for the 2836 Baruch Siach <baruch@tkos.co.il> - 2015-12-17 06:30 +0100
[PATCH v2 6/8] ARM: bcm2835: Add devicetree for bcm2836 and Raspberry Pi 2 B Eric Anholt <eric@anholt.net> - 2015-12-17 01:00 +0100
Re: [PATCH v2 6/8] ARM: bcm2835: Add devicetree for bcm2836 and Raspberry Pi 2 B Alexander Aring <alex.aring@gmail.com> - 2015-12-22 11:20 +0100
[PATCH v2 7/8] ARM: bcm2835: Add a compat string for bcm2836 machine probe Eric Anholt <eric@anholt.net> - 2015-12-17 01:00 +0100
Re: [PATCH v2 0/8] Raspberry Pi 2 support. Arnd Bergmann <arnd@arndb.de> - 2015-12-17 01:10 +0100
Re: [PATCH v2 0/8] Raspberry Pi 2 support. Eric Anholt <eric@anholt.net> - 2015-12-17 01:40 +0100
Re: [PATCH v2 0/8] Raspberry Pi 2 support. Stefan Wahren <stefan.wahren@i2se.com> - 2015-12-17 10:00 +0100
Re: [PATCH v2 0/8] Raspberry Pi 2 support. Arnd Bergmann <arnd@arndb.de> - 2015-12-17 11:30 +0100
Re: [PATCH v2 0/8] Raspberry Pi 2 support. Alexander Aring <alex.aring@gmail.com> - 2015-12-18 11:10 +0100
Re: [PATCH v2 0/8] Raspberry Pi 2 support. Alexander Aring <alex.aring@gmail.com> - 2015-12-18 12:00 +0100
Re: [PATCH v2 0/8] Raspberry Pi 2 support. Alexander Aring <alex.aring@gmail.com> - 2015-12-20 23:20 +0100
Re: [PATCH v2 0/8] Raspberry Pi 2 support. Eric Anholt <eric@anholt.net> - 2015-12-22 00:10 +0100
Re: [PATCH v2 0/8] Raspberry Pi 2 support. Alexander Aring <alex.aring@gmail.com> - 2015-12-22 15:30 +0100
Re: [PATCH v2 0/8] Raspberry Pi 2 support. Eric Anholt <eric@anholt.net> - 2015-12-22 20:10 +0100
Re: [PATCH v2 0/8] Raspberry Pi 2 support. Noralf Trønnes <noralf@tronnes.org> - 2015-12-26 22:50 +0100
Re: [PATCH v2 0/8] Raspberry Pi 2 support. Arnd Bergmann <arnd@arndb.de> - 2015-12-22 00:20 +0100
Re: [PATCH v2 0/8] Raspberry Pi 2 support. Alexander Aring <alex.aring@gmail.com> - 2015-12-22 15:30 +0100
Re: [PATCH v2 0/8] Raspberry Pi 2 support. Arnd Bergmann <arnd@arndb.de> - 2015-12-22 22:30 +0100
Re: [PATCH v2 0/8] Raspberry Pi 2 support. Eric Anholt <eric@anholt.net> - 2015-12-25 01:10 +0100
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