Re: [RFC PATCH v3 4/8] arm64: Handle early CPU boot failures

From	Will Deacon <will.deacon@arm.com>
Newsgroups	linux.kernel
Subject	Re: [RFC PATCH v3 4/8] arm64: Handle early CPU boot failures
Date	2015-12-16 12:30 +0100
Message-ID	<qGirn-175-11@gated-at.bofh.it> (permalink)
References	<qDJHs-6FW-3@gated-at.bofh.it> <qDJR8-6Yw-11@gated-at.bofh.it> <qFWqS-3yI-19@gated-at.bofh.it> <qGhF0-zW-21@gated-at.bofh.it>
Organization	linux.* mail to news gateway

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On Wed, Dec 16, 2015 at 10:39:50AM +0000, Suzuki K. Poulose wrote:
> On 15/12/15 11:55, Will Deacon wrote:
> >On Wed, Dec 09, 2015 at 09:57:15AM +0000, Suzuki K. Poulose wrote:
> 
> >>  /*
> >>   * Initial data for bringing up a secondary CPU.
> >>+ * @stack  - sp for the secondary CPU
> >>+ * @status - Result passed back from the secondary CPU to
> >>+ *           indicate failure.
> >>   */
> >>  struct secondary_data {
> >>  	void *stack;
> >>-};
> >>+	unsigned long status;
> >>+} ____cacheline_aligned;
> >
> >Why is this necessary?
> 
> That was based on a suggestion from Mark Rutland here:
> 
>   https://lkml.org/lkml/2015/12/1/580

That thread is talking about the CWG, which is not the same thing as
____cacheline_aligned. Given that the architectural maximum for the CWG
is 2K, we can probably get away with allocating the status field amongst
the head.S text instead (which we know will be clean).

Since SMP boot is serialised, that should be sufficient, right?

Will
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Thread

Re: [RFC PATCH v3 4/8] arm64: Handle early CPU boot failures Will Deacon <will.deacon@arm.com> - 2015-12-15 13:00 +0100
  Re: [RFC PATCH v3 4/8] arm64: Handle early CPU boot failures "Suzuki K. Poulose" <Suzuki.Poulose@arm.com> - 2015-12-16 11:40 +0100
    Re: [RFC PATCH v3 4/8] arm64: Handle early CPU boot failures Will Deacon <will.deacon@arm.com> - 2015-12-16 12:30 +0100
      Re: [RFC PATCH v3 4/8] arm64: Handle early CPU boot failures Mark Rutland <mark.rutland@arm.com> - 2015-12-16 12:40 +0100

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