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Re: [PATCHv3 3/5] arm-cci: Add routines to enable/disable all counters

From "Suzuki K. Poulose" <Suzuki.Poulose@arm.com>
Newsgroups linux.kernel
Subject Re: [PATCHv3 3/5] arm-cci: Add routines to enable/disable all counters
Date 2015-12-10 16:50 +0100
Message-ID <qEbDI-87n-11@gated-at.bofh.it> (permalink)
References <qvSRz-8wu-5@gated-at.bofh.it> <qvSRA-8wu-9@gated-at.bofh.it> <qEbu1-83j-1@gated-at.bofh.it>
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On 10/12/15 15:32, Mark Rutland wrote:
> On Tue, Nov 17, 2015 at 06:03:25PM +0000, Suzuki K. Poulose wrote:


>> +static void __maybe_unused
>> +pmu_disable_counters(struct cci_pmu *cci_pmu, unsigned long *mask)
>> +{
>> +	int i;
>> +
>> +	for (i = 0; i < cci_pmu->num_cntrs; i++) {
>> +		if (pmu_counter_is_enabled(cci_pmu, i)) {
>> +			set_bit(i, mask);
>> +			pmu_disable_counter(cci_pmu, i);
>> +		} else
>> +			clear_bit(i, mask);
>
> Can we not assume a clean mask to begin with?

If we force the caller to pass a clean mask, yes we could. I am fine
with either approach.

>
>> +	}
>> +}
>> +
>> +/*
>> + * Restore the status of the counters. Reversal of the pmu_disable_counters().
>> + * For each counter set in the mask, enable the counter back.
>> + */
>> +static void __maybe_unused
>> +pmu_restore_counters(struct cci_pmu *cci_pmu, unsigned long *mask)
>
> This would probably be better with s/restore/enable/ for consistency
> with pmu_disable_counters.

I had thought as well, but then chose restore as we don't enable all the
counters. Given that we pass a mask argument, it is fine to change it to
enable and will do that in the next one.

>
> Other than that this looks fine to me.

Thanks for the review.

Cheers
Suzuki

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Re: [PATCHv3 3/5] arm-cci: Add routines to enable/disable all  counters Mark Rutland <mark.rutland@arm.com> - 2015-12-10 16:40 +0100
  Re: [PATCHv3 3/5] arm-cci: Add routines to enable/disable all  counters Mark Rutland <mark.rutland@arm.com> - 2015-12-10 16:50 +0100
  Re: [PATCHv3 3/5] arm-cci: Add routines to enable/disable all  counters "Suzuki K. Poulose" <Suzuki.Poulose@arm.com> - 2015-12-10 16:50 +0100

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