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Groups > linux.kernel > #1286147
| From | "Yankejian (Hackim Yim)" <yankejian@huawei.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH RESEND net-next 3/3] arm64: hip05-d02: Document devicetree bindings for Hisilicon D02 Board |
| Date | 2015-12-08 02:50 +0100 |
| Message-ID | <qDfzH-4ag-5@gated-at.bofh.it> (permalink) |
| References | <qCfBM-5YV-3@gated-at.bofh.it> <qCfLs-66U-13@gated-at.bofh.it> <qD3RU-4Wd-15@gated-at.bofh.it> <qD4kW-56d-7@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On 2015/12/7 21:48, Bintian wrote:
> On 2015/12/7 21:16, Rob Herring wrote:
>> On Sat, Dec 05, 2015 at 03:54:48PM +0800, yankejian wrote:
>>> This patch adds documentation for the devicetree bindings used by the
>>> DT files of Hisilicon Hip05-D02 development board.
>>>
>>> Signed-off-by: yankejian <yankejian@huawei.com>
> You may need to configure as "Kejian Yan <yankejian@huawei.com>" :)
>
> BR,
>
> Bintian
agree, thanks
BR,
Kejian Yan
>>> ---
>>> .../devicetree/bindings/arm/hisilicon/hisilicon.txt | 16 ++++++++++++++++
>>> 1 file changed, 16 insertions(+)
>>>
>>> diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
>>> index 6ac7c00..5318d78 100644
>>> --- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
>>> +++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
>>> @@ -187,6 +187,22 @@ Example:
>>> reg = <0xb0000000 0x10000>;
>>> };
>>> +Hisilicon HiP05 PERISUB system controller
>>> +
>>> +Required properties:
>>> +- compatible : "hisilicon,peri-c-subctrl", "syscon";
>> This should be more specific and have the SOC name in it.
>>
>>> +- reg : Register address and size
>>> +
>>> +The HiP05 PERISUB system controller is shared by peripheral controllers in
>>> +HiP05 Soc to implement some basic configurations. the peripheral
>>> + controllers include mdio, ddr, iic, uart, timer and so on.
>>> +
>>> +Example:
>>> + /* for HiP05 PCIe-SAS system */
>>> + pcie_sas: system_controller@0xb0000000 {
>>> + compatible = "hisilicon,pcie-sas-subctrl", "syscon";
>> The example doesn't match.
>>
Thanks for this. I have changed this in PATCH V2 already floated.
BR
Kejian Yan
>>> + reg = <0xb0000000 0x10000>;
>>> + };
>>> -----------------------------------------------------------------------
>>> Hisilicon CPU controller
>>> --
>>> 1.9.1
>>>
>>> --
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[PATCH RESEND net-next 0/3] dts: hisi: fixes can't find eth for hip05-D02 yankejian <yankejian@huawei.com> - 2015-12-05 08:50 +0100
[PATCH RESEND net-next 2/3] dts: hisi: fixes no syscon error when init mdio yankejian <yankejian@huawei.com> - 2015-12-05 08:50 +0100
[PATCH RESEND net-next 3/3] arm64: hip05-d02: Document devicetree bindings for Hisilicon D02 Board yankejian <yankejian@huawei.com> - 2015-12-05 08:50 +0100
Re: [PATCH RESEND net-next 3/3] arm64: hip05-d02: Document devicetree bindings for Hisilicon D02 Board Rob Herring <robh@kernel.org> - 2015-12-07 14:20 +0100
Re: [PATCH RESEND net-next 3/3] arm64: hip05-d02: Document devicetree bindings for Hisilicon D02 Board Bintian <bintian.wang@huawei.com> - 2015-12-07 14:50 +0100
Re: [PATCH RESEND net-next 3/3] arm64: hip05-d02: Document devicetree bindings for Hisilicon D02 Board "Yankejian (Hackim Yim)" <yankejian@huawei.com> - 2015-12-08 02:50 +0100
Re: [PATCH RESEND net-next 0/3] dts: hisi: fixes can't find eth for hip05-D02 "Yankejian (Hackim Yim)" <yankejian@huawei.com> - 2015-12-05 09:00 +0100
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