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|---|---|
| From | Jisheng Zhang <jszhang@marvell.com> |
| Newsgroups | linux.kernel |
| Subject | [PATCH 2/2] ARM: dts: berlin: add 2nd clock for BG2Q sdhci0 and sdhci1 |
| Date | Mon, 07 Dec 2015 14:20:01 +0100 |
| Message-ID | <qD3RT-4Wd-5@gated-at.bofh.it> (permalink) |
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| X-Original-To | <sebastian.hesselbarth@gmail.com>, <robh+dt@kernel.org>, <pawel.moll@arm.com>, <mark.rutland@arm.com>, <ijc+devicetree@hellion.org.uk>, <galak@codeaurora.org>, <linux@arm.linux.org.uk> |
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| X-Original-Cc | <linux-arm-kernel@lists.infradead.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, Jisheng Zhang <jszhang@marvell.com> |
| X-Original-Date | Mon, 7 Dec 2015 21:09:25 +0800 |
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| Xref | csiph.com linux.kernel:1285291 |
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We removed CLK_IGNORE_UNUSED from CLKID_SDIO's flag, so the sdhci0 and
sdhci1 don't work. We fix this by adding the optional 2nd clock for
BG2Q's sdhci0 and sdhci1. This patch brings another benefit: the 2nd
clock can be disabled during runtime pm, so saves power a bit.
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
---
arch/arm/boot/dts/berlin2q.dtsi | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi
index 5b10129..fb1da99 100644
--- a/arch/arm/boot/dts/berlin2q.dtsi
+++ b/arch/arm/boot/dts/berlin2q.dtsi
@@ -118,7 +118,8 @@
sdhci0: sdhci@ab0000 {
compatible = "mrvl,pxav3-mmc";
reg = <0xab0000 0x200>;
- clocks = <&chip_clk CLKID_SDIO1XIN>;
+ clocks = <&chip_clk CLKID_SDIO1XIN>, <&chip_clk CLKID_SDIO>;
+ clock-names = "io", "core";
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
@@ -126,7 +127,8 @@
sdhci1: sdhci@ab0800 {
compatible = "mrvl,pxav3-mmc";
reg = <0xab0800 0x200>;
- clocks = <&chip_clk CLKID_SDIO1XIN>;
+ clocks = <&chip_clk CLKID_SDIO1XIN>, <&chip_clk CLKID_SDIO>;
+ clock-names = "io", "core";
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
--
2.6.2
--
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[PATCH 0/2] arm: dts: berlin: fix BG2Q sdhci clk Jisheng Zhang <jszhang@marvell.com> - 2015-12-07 14:20 +0100 [PATCH 2/2] ARM: dts: berlin: add 2nd clock for BG2Q sdhci0 and sdhci1 Jisheng Zhang <jszhang@marvell.com> - 2015-12-07 14:20 +0100 [PATCH 1/2] ARM: dts: berlin: correct BG2Q's sdhci2 2nd clock Jisheng Zhang <jszhang@marvell.com> - 2015-12-07 14:20 +0100 Re: [PATCH 0/2] arm: dts: berlin: fix BG2Q sdhci clk Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> - 2015-12-10 21:20 +0100
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