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[tip:irq/urgent] irqchip/GICv2m: Fix GICv2m build warning on 32 bits

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Commit-ID:  157add60cb35913b8a848a3d7e6456b8ed134796
Gitweb:     http://git.kernel.org/tip/157add60cb35913b8a848a3d7e6456b8ed134796
Author:     Pavel Fedin <p.fedin@samsung.com>
AuthorDate: Sun, 13 Sep 2015 12:14:33 +0100
Committer:  Thomas Gleixner <tglx@linutronix.de>
CommitDate: Tue, 15 Sep 2015 17:06:29 +0200

irqchip/GICv2m: Fix GICv2m build warning on 32 bits

After GICv2m was enabled for 32-bit ARM kernel, a warning popped up:

drivers/irqchip/irq-gic-v2m.c: In function gicv2m_compose_msi_msg:
drivers/irqchip/irq-gic-v2m.c:100:2: warning: right shift count >= width
of type [enabled by default]
  msg->address_hi = (u32) (addr >> 32);
  ^

This patch fixes it by using proper macros for splitting up the value.

Signed-off-by: Pavel Fedin <p.fedin@samsung.com>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: Stuart Yoder <stuart.yoder@freescale.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Link: http://lkml.kernel.org/r/1442142873-20213-4-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 drivers/irqchip/irq-gic-v2m.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/irqchip/irq-gic-v2m.c b/drivers/irqchip/irq-gic-v2m.c
index db04fc1..12985da 100644
--- a/drivers/irqchip/irq-gic-v2m.c
+++ b/drivers/irqchip/irq-gic-v2m.c
@@ -95,8 +95,8 @@ static void gicv2m_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
 	struct v2m_data *v2m = irq_data_get_irq_chip_data(data);
 	phys_addr_t addr = v2m->res.start + V2M_MSI_SETSPI_NS;
 
-	msg->address_hi = (u32) (addr >> 32);
-	msg->address_lo = (u32) (addr);
+	msg->address_hi = upper_32_bits(addr);
+	msg->address_lo = lower_32_bits(addr);
 	msg->data = data->hwirq;
 }
 
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[PATCH 0/3] GIC fixes for 4.3-rc2 Marc Zyngier <marc.zyngier@arm.com> - 2015-09-13 13:20 +0200
  [PATCH 1/3] irqchip/GIC: Add workaround for aliased GIC400 Marc Zyngier <marc.zyngier@arm.com> - 2015-09-13 13:20 +0200
    [tip:irq/urgent] irqchip/GIC: Add workaround for aliased GIC400 tip-bot for Marc Zyngier <tipbot@zytor.com> - 2015-09-15 18:00 +0200
  [PATCH 2/3] irqchip/gic-v3-its: Add missing cache flushes Marc Zyngier <marc.zyngier@arm.com> - 2015-09-13 13:20 +0200
    [tip:irq/urgent] irqchip/gic-v3-its: Add missing cache flushes tip-bot for Marc Zyngier <tipbot@zytor.com> - 2015-09-15 17:50 +0200
  [PATCH 3/3] irqchip/GICv2m: Fix GICv2m build warning on 32 bits Marc Zyngier <marc.zyngier@arm.com> - 2015-09-13 13:20 +0200
    [tip:irq/urgent] irqchip/GICv2m:   Fix GICv2m build warning on 32 bits tip-bot for Pavel Fedin <tipbot@zytor.com> - 2015-09-15 18:00 +0200

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