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Groups > linux.kernel > #1224028
| From | Caesar Wang <wxt@rock-chips.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH 3/3] ARM64: dts: rk3368: Add mailbox device nodes |
| Date | 2015-09-14 13:10 +0200 |
| Message-ID | <q8zO2-4pn-11@gated-at.bofh.it> (permalink) |
| References | <q8zO2-4pn-1@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
This adds mailbox device nodes in dts.
mailbox is used by the Rockchip CPU cores to communicate
requests to MCU processormZ
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---
arch/arm64/boot/dts/rockchip/rk3368.dtsi | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index a712bea..9ac5cca 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -484,6 +484,19 @@
status = "disabled";
};
+ mbox: mbox@ff6b0000 {
+ compatible = "rockchip,rk3368-mailbox";
+ reg = <0x0 0xff6b0000 0x0 0x1000>,
+ <0x0 0xff8cf000 0x0 0x1000>; /* the end 4k of sram */
+ interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru PCLK_MAILBOX>;
+ clock-names = "pclk_mailbox";
+ #mbox-cells = <1>;
+ };
+
pmugrf: syscon@ff738000 {
compatible = "rockchip,rk3368-pmugrf", "syscon";
reg = <0x0 0xff738000 0x0 0x1000>;
--
1.9.1
--
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[PATCH 0/3] mailbox: rockchip: Add mailbox driver for Rockchip platform Caesar Wang <wxt@rock-chips.com> - 2015-09-14 13:10 +0200 [PATCH 3/3] ARM64: dts: rk3368: Add mailbox device nodes Caesar Wang <wxt@rock-chips.com> - 2015-09-14 13:10 +0200 [PATCH 2/3] mailbox: rockchip: Add Rockchip mailbox driver Caesar Wang <wxt@rock-chips.com> - 2015-09-14 13:10 +0200 [PATCH 1/3] dt-bindings: Add document of Rockchip mailbox Caesar Wang <wxt@rock-chips.com> - 2015-09-14 13:10 +0200
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